應力對超薄閘極氧化層金氧半元件之效應

Effects of Stress on MOS Devices with Ultra Thin Gate Oxides

洪劍睿(Chien-Jui Hung)

指導教授 ： 胡振國

國立臺灣大學/電機資訊學院/電子工程學研究所/碩士(2005年)

https://doi.org/10.6342/NTU.2005.00253

摘要

晶圓不論是從製程一直到封裝，都會存在一些應力使得晶圓的特性受到改變。尤其奈米技術的蓬勃發展，所有元件的尺寸也就跟著越來越小，使得外部所引起的應力對元件的特性影響日與聚增。本篇論文主要就是討論一些不同種類的應力對超薄閘極氧化層的影響，以及如果在快速熱成長氧化層過程中施以應力，會對生長氧化層過程中造成或好或壞的影響，並與無外加應力所生長的氧化層作比較並詳細的討論。
在第二章中，我們研究外加應力對MOS(P)的閘極氧化層的影響，利用鑽石刀將晶片切成兩半，實驗發現，晶片切割會造成氧化層介面以及矽基板原子鍵結的斷裂，使得元件特性造成改變。研究晶片不同部位切割前後元件的特性變化，並對切割後的晶片作高溫退火技術，繪製退火前後的圖形，作統計圖表示其差異，發現漏流特性有所改善。
在第三章中，我們在快速熱成長氧化層過程中施以應力。我們定做一個石英模子，石英模子中間疊一到三個不等的小片晶片，並於上面放置三寸晶片，使得晶片呈現一弧狀，並進行快速熱成長氧化層，量測其電壓-電流和電壓-電容特性
，觀察施以應力對氧化層生成的影響，發現應力會造成氧化層界面特性改變。
在第四章中，我們利用了溫差所產生的應力來影響氧化層生成，在晶片上疊一條長方形的長條晶片，疊於圓形晶片中間，並作快速熱成長氧化層，觀察有無覆蓋的區域氧化層的厚度與特殊電特性，發現有覆蓋的區域氧化層厚度增加，但並不是十分均勻，後來又作了相同實驗，不同溫度與覆蓋不同型狀的晶片，並証實了覆蓋的區域氧化層的確較厚。比較相同的氧化層厚度有受應力影響的氧化層與一般正常狀態所生長之氧化層兩者之間特性，並討論其優缺點，發現受給予施加應力能在低溫狀態促使氧化層生長，然而氧化層均勻度卻比無外加應力來的差。
最後一章，將描述我目前所做有待改進的地方，並且建議在將來，如何運用目前所作的成果來對晶圓製程有所改善。

關鍵字

應力 ； 元件

並列摘要

From fabrication to package, the wafers always sustain stress that makes the characteristics of wafer changing. Due to the rapid growth of nano technology development, dimensions of devices becomes smaller and smaller. The external stress is therefore becoming important to the characteristics of devices. This work investigate the effects of deferent kinds of stress on ultra thin gate oxide. We try to observe the variation of the growth of oxide when external stress is applied on wafer during thermal oxidation process. We compare the results with and without stress. Detailed discussions are given in this chapter.
In chapter 2, we studied of effect of external stress due to scribing to MOS gate oxide. We used the diamond knife to cut the wafer into two parts. This behavior would make the bonds at the interfaces of oxide and silicon substract be stretched-out, and therefore change the characteristics of devices. We analyze the characteristics in different parts of wafer after cutting, The cut wafers will receive a followed rapid thermal anneal process. The distributions of data came from the samples before and after anneals are studied to find out the difference between them. The leakage current property was observed to be changed.
In chapter 3, we applied external stress on wafer during rapid thermal oxidation process. We designed a quartz holder in which one to four or more wafer chips can be put between the wafer and quartz. The wafer appeared to be an arc form like shape and was oxidized by the rapid thermal oxidation process. From the I-V and C-V characteristics, one can observe the external stress effect to the growth of oxidation. It was found that external stress would affect the characteristics of oxide interface significantly.
In chapter 4, we use the thermal stress to affect the growth of oxidation. A rectangular shape wafer was put upon the center of a 3inch wafer during oxidation in rapid thermal processor. The thickness of oxides and the electrical characteristics of the samples both in the covered part and the uncoved part are examined. The thickness of oxide in covered part is increased, but exhibits poor uniformity. Experiments under different temperature and different shapes of covering wafer are carried out. The observations are of the same behavior that the thickness of oxidation in the covered part is increased. The characteristics between the oxide with stress and the oxide without stress under the same EOT, are discussed in this work. It was found stress that stress can enhance the growth of oxidion in low temperature situation. However, the uniformity of such oxide is worse than the oxide growth in normal condition.
In the last chapter, the suggestions of this work are discussed.

並列關鍵字

stress ； MOS

參考文獻

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