透過您的圖書館登入
IP:3.138.174.95
  • 學位論文

應用於5G通訊之Ka頻段寬頻可變增益放大器與Ka頻段之向量合成相移器

Ka-band Wideband VGA and Ka-band Vector-sum Phase Shifter for 5G Communication

指導教授 : 盧信嘉

摘要


本論文主要設計寬頻可變增益放大器與向量和式相移器,其操作頻段為Ka頻段。寬頻可變增益放大器可搭配功率偵測系統校正多輸入多輸出陣列天線。向量和式相移器以28 GHz為中心頻段,主要使用於波束賦形技術提升系統效率和傳輸品質,兩者都可應用於第五代毫米波通訊系統。 本論文第一顆晶片為Ka 頻段寬頻數位式可變增益放大器,使用了正回授與電流再利用與雙重耦合變壓技術拓展放大器的頻寬,在低功耗下提供足夠的增益,且利用雙重耦合變壓器之間的交流共接地電容隔絕切換增益時造成的輸出阻抗變化,並在開關電晶體加入源極退化電感減緩切換增益時造成的輸入阻抗 變化,維持頻寬。此電路使用台積電90 nm CMOS 製程實現,量測到的3-dB 頻寬為11.2 GHz,中心頻為35 GHz,最大21S 為17.92 dB,可變增益為17.92、11.53 和9.38 dB,直流功耗為13.08 mW。 第二顆晶片為28 GHz 向量和式相移器,使用被動90°耦合器,將輸入訊號轉換為正交訊號,分別送入平衡不平衡轉換器並產生+/-I及Q訊號,再送入可變增益向量合成器並透過切換增益達到相位移的效果。可變增益向量合成器使用了抵銷式可變增益放大器與電流再利用雙重耦合變壓器技術,並使用電流鏡維持增益變化時的直流消耗功率,且節省了功率合成器的面積。此電路使用台積電90 nm CMOS 製程實現,在28 GHz 量測時可產生等效4bit 相位解析度,其均方根增益與相位誤差分別為0.44 dB 和0.23°,平均21S 為-7.53 dB,直流功耗為9.64 mW,整體佈局面積為0.35 mm2。

並列摘要


This thesis presents a wideband variable gain amplifier and a vector-sum phase shifter in Ka band. The wideband variable gain amplifier can be used with the power detector system to calibrate antenna array. The vector-sum phase shifter can be applied to the beamforming technology to enhance the efficiency of the system and transmission quality. Both of them can be applied at the millimeter wave band for fifthgeneration communication system. The first chip is a Ka band wideband digital variable gain amplifier. Positive feedback and current-reused with double transformer coupling technique are used to expand the bandwidth of the amplifier, and generates sufficient gain at low power consumption. Using the AC common ground capacitor in the double transformer can isolate the output impedance variation when gain switching. The source degeneration inductor in the switching transistor can mitigate the input impedance variation when switching gain and maintain the bandwidth. This circuit is implemented by TSMC 90nm CMOS technology. The measured 3-dB bandwidth is 11.2 GHz at the center frequency of 35 GHz, with peak gain at 17.92 dB. Other gain states are 11.53 and 9.38 dB, and the DC power consumption is 13.08 mW. The second chip is a 28 GHz vector-sum phase shifter. Passive 90° coupler is used to convert the input signal into the quadrature signals. Balun is used to generate +/- IQ signal then go through the variable gain vector adder to achieve the phase shift by switching the gain. The variable gain vector adder uses the parasitic cancellation variable gain amplifier and the current-reused amplifier. Current mirror is used to maintain the DC power consumption when switching the gain, and save the area of the power combiner. This circuit is implemented by TSMC 90 nm CMOS technology. It can realize 4-bit phase shift resolution. The measured RMS amplitude error and phase error at 28GHz are 0.44 dB and 0.23°, the average gain is -7.53 dB, the DC power consumption is 9.64 mW, and the area is 0.35 mm2。

參考文獻


[1] T. S. Rappaport, Y. Xing, G. R. MacCartney, A. F. Molisch, E. Mellios, and J. Zhang, "Overview of millimeter wave communications for fifth-generation (5G) wireless networks—with a focus on propagation models," IEEE Transactions on Antennas and Propagation, vol. 65, no. 12, pp. 6213-6230, Dec. 2017.
[2] Techplayon. "5G frequency bands." https://www.techplayon.com/5g-frequency-bands/
[3] M. Fakharzadeh, M. Nezhad-Ahmadi, B. Biglarbegian, J. Ahmadi-Shokouh, and S. Safavi-Naeini, "CMOS phased array transceiver technology for 60 GHz wireless applications," IEEE Transactions on Antennas and Propagation, vol. 58, no. 4, pp. 1093-1104, Apr. 2010.
[4] K. Kibaroglu, M. Sayginer, and G. M. Rebeiz, "A low-cost scalable 32-element 28-GHz phased array transceiver for 5G communication links based on a 2 x 2 beamformer flip-chip unit cell," IEEE Journal of Solid-State Circuits, vol. 53, no. 5, pp. 1260-1274, May 2018.
[5] H. Hsieh and L. Lu, "A 40-GHz low-noise amplifier with a positive-feedback network in 0.18-μm CMOS," IEEE Transactions on Microwave Theory and Techniques, vol. 57, no. 8, pp. 1895-1902, Aug. 2009.

延伸閱讀