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  • 學位論文

低增益誤差CMOS可變增益放大器之設計

Designs of CMOS Variable Gain Amplifiers for Low-Gain-Error Applications

指導教授 : 呂良鴻

摘要


本論文針對可程式化增益放大器(Programmable Gain Amplifier, PGA)與可變增益放大器(Variable Gain Amplifier, VGA)提出了幾種增益控制機制。在無線通訊系統中,天線接收到的訊號變化劇烈,因此需要一個精確的分貝線性VGA或PGA,將接收訊號的動態範圍,轉換至類比轉數位轉換器可接受的範圍。本論文中也討論且分析了幾種可變增益放大器的架構,以及近似指數函數。為了得到寬分貝線性增益範圍與低增益誤差的特性,提出的PGA及VGA分別採用了增益範圍補償及假指數函數近似的技巧。PGA與VGA皆以0.18-μm互補式金屬氧化物半導體製程製作。串接的PGA 晶片面積為0.08平方毫米,功耗為3.83毫瓦,在0.21分貝的增益誤差下,可以達到69.9 分貝的增益範圍,並且在最高增益與最低增益的3分貝頻寬量測結果分別為19 M赫茲與315 M赫茲。單級的VGA晶片面積為0.035平方毫米,功耗為0.92毫瓦,在0.35分貝的增益誤差下,可以達到40.2 分貝的增益範圍,並且在最高增益與最低增益的3分貝頻寬量測結果分別為20.9 M赫茲與240 M赫茲。

並列摘要


Several gain control mechanisms for the design of programmable gain amplifier (PGA) and variable gain amplifier (VGA) are presented in this thesis. In wireless communication systems, the received signal changes significantly. Therefore, an accurate decibel (dB)-linear PGA or VGA is required to convert the dynamic range of received signal into an acceptable range for the analog-to-digital converter (ADC). Several variable gain amplifier architectures and exponential-approximation functions are discussed and analyzed in this thesis. In order to obtain the characteristics of wide dB-linear gain range and small gain error, the gain-range-compensating technique and a pseudo-exponential approximation method are proposed and adopted in the cascading PGA and the single-stage VGA, respectively. Both PGA and VGA are fabricated in the 0.18-μm CMOS process. The cascading PGA occupies an area of 0.08 mm2, consuming a dc power of 3.83 mW. A gain range of 69.9 dB with 0.21 dB gain error is achieved. The 3-dB bandwidth is measured from 19 MHz to 315 MHz in the maximum and minimum gain setting, respectively. The single-stage VGA occupies an area of 0.035 mm2. The power consumption of the core circuit is 0.92 mW. A gain range of 40.2 dB with 0.35 dB gain error is achieved. The 3-dB bandwidth is measured from 20.9 MHz to 240 MHz in the maximum and minimum gain setting, respectively.

並列關鍵字

無線接收器 放大器

參考文獻


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[3] Okjune Jeon, Robert M. Fox, and Brent A. Myers “Analog AGC circuitry for a CMOS WLAN receiver,” IEEE Journal of Solid-State Circuits, vol. 41, no. 10, pp. 2291-2300, Oct. 2006.
[4] Y. S. Youn and J. H. Choi, “Fast-settling feedforward automatic gain control based on a new gain control approach,” IEEE Transactions on Circuits and Systems II, Express Briefs, vol. 61, no. 9, pp. 651-655, Sep. 2014.
[5] J. M. Khoury, “On the design of constant settling time AGC circuits,” IEEE Transactions on Circuits Syst. II, Analog and Digital Signal Processing, vol. 45, no. 3, pp. 283–294, Mar. 1998.

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