電子構裝在一序列階段性製程之翹曲變形的實驗與數值研究

Accurate Warp Prediction of Electronic Packaging During a Sequential Manufacturing Process by Measurement and Simulation Analysis

陳志松(Chi-Sung Chen)

指導教授 ： 楊照彥

國立臺灣大學/工學院/應用力學研究所/博士(2007年)

https://doi.org/10.6342/NTU.2007.00637

摘要

本文以塑封球柵陣列構裝與基板內埋晶片構裝為主題，探討一序列階段性高溫製程之翹曲變形，利用實驗與數值模擬分析進行比對驗證，提出較具有影響力的製程作為設計的範本。實驗分析以自行架設之相移陰影疊紋量測系統進行高溫歷程之量測；數值分析以元素生與死法進行一序列串階段性製程之模擬。對於塑封球柵陣列構裝，考慮：BT (Bismalemide Triazine, BT)基板成形效應、黏晶、鑄模灌酯與迴焊製程；對於基板內埋晶片構裝，考慮：120℃晶片與基板之結合、180℃樹脂附銅膜與基板之熱壓合成形、電路鑽孔建構製程、預金屬化製程、金屬化製程、電路圖案化、綠漆塗佈成形、錫球窗口成形與迴焊製程。除此之外，對於BT基板的成形內應力效應，特別考慮其隨溫度產生的翹曲變形，還有，對於鑄模灌酯材料之特性，特別考慮化學模縮效應與玻璃轉化溫度效應，將可得到精準的預測，否則將得到錯誤的結果。

關鍵字

塑封球柵陣列構裝 ； 基板內埋晶片構裝 ； 一序列階段性高溫製程 ； 相移陰影疊紋量測系統

並列摘要

A mechanical model followed a sequential manufacturing process was considered in order to simulate the warpage during a sequential steps of the assembly of a plastic encapsulated ball grid arrays (BGA) package, such as die attachment, encapsulation, and solder reflow process. A chip in substrate package, which including die attachment, resin coated copper (RCC) lamination, structuring, pre-metallization, metallization, patterning, solder mask curing, solder opening and solder reflow was used as a model IC package. Experimental measurement analysis (EMA) of the thermal residual warp field of the substrate caused by the coefficient of thermal expansion (CTE) mismatch among these materials in processes are employed to validate models of finite element analysis (FEA) by the shadow moiré with phase stepping technique. Failure to incorporate chemical shrinkage of epoxy molding compound (EMC) or residual warp field of a sequential process into the numerical analysis leads to erroneous predictions of the warp behavior. With the help of the experimental measurements carried about the befitting level of sensitivity, and together with the numerical simulation which takes into account of the effects of chemical shrinkage of EMC and residual warp field of a sequential process, engineers will be able to predict residual warps as well as stresses field for every manufacturing process.

並列關鍵字

plastic encapsulated ball grid arrays (BGA) ； chip in substrate package ； a sequential manufacturing process

參考文獻

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