使用CMOS製程應用於5G通訊毫米波頻段與Ka頻段衛星接收系統相移器晶片

Phase Shifters for 5G Communication at Millimeter Wave Band and Ka-Band Satellite System Using CMOS Process

王文裕(Wen-Yu Wang)

指導教授 ： 盧信嘉

國立臺灣大學/電機資訊學院/電子工程學研究所/碩士(2019年)

https://doi.org/10.6342/NTU201900079

摘要

本論文設計兩個向量和式相移器，第一顆晶片為使用主動IQ訊號產生器之Ka頻段向量和相移器，可應用於衛星接收系統。而第二顆晶片為具相位補償之Ka頻段向量和相移器，可應用於5G毫米波通訊系統。
第一個電路使用主動IQ訊號產生器，來提供具有增益之正交訊號，接著經雙相調變器的開與關，來達到訊號的反向，因此能提供出四個象限之訊號，最後結由向量加法器來調整I與Q路徑之訊號大小，進而合成所需相位。此電路採用台積電0.18 μm CMOS製程來實現，在19 GHz量測之均方根相位與增益誤差分別為0.31°與0.63 dB，平均|S21|為-1.25 dB，平均直流功耗約為10 mW。
第二個電路使用被動90°耦合器，正交訊號傳遞至雙相調變器，來產生四個象限，而兩路訊號分別送至具有相位補償的可調增益放大器，放大器之中間級為調整級，如此一來，最後一級之疊接放大器可以屏障輸出阻抗之變化，可以有較好之輸出反射損耗表現，相位補償的部分同樣在中間級，我們在疊接放大器共閘極的閘極端接上小電容與共源極的源極端加上電感，來抑制相位變化。此電路也採用台積電0.18 μm CMOS製程來實現，在28 GHz量測之均方根相位與增益誤差分別為0.6°與0.57 dB，平均|S21| 為-4.73 dB，直流功耗小於10.5 mW。

關鍵字

衛星系統 ； 5G通訊 ； Ka頻帶 ； 向量和式相移器 ； 主動耦合器 ； 相位補償 ； 可調增益放大器

並列摘要

This thesis presents two vector-sum phase shifters. The first vector-sum phase shifter uses active IQ signal generator and can be used for satellite receiver system at Ka band. The second one uses phase compensation variable gain amplifier and can be used for 5G millimeter wave communication system at Ka band.
The first phase shifter uses active IQ signal generator to provide positive quadrature signal, these signals can then be inverted by bi-phase modulators, so we can generate signals at four quadrants. Finally, we use vector adder to adjust amplitude of I/Q signals, and synthesize desired phase. This circuit is implemented by TSMC 0.18 μm CMOS technology. The measured RMS phase error and amplitude error at 19 GHz are 0.31° and 0.63 dB, the average gain is -1.25 dB and average DC power consumption is 10 mW.
The second phase shifter use passive 90° coupler, and bi-phase modulator to generate signals at four quadrants, I/Q signals then go through at 3-stage variable gain amplifier with phase compensation. The final stage of variable gain amplifier is a cascode amplifier which can reduce the variation of output impedance under phase change. The phase compensation is implemented in the middle stage, to mitigate the phase variation, by connecting a small varactor to common gate of cascode amplifier and inductor to common source of cascode amplifier. This circuit is implemented by TSMC 0.18 μm CMOS technology, the measured RMS phase error and amplitude error at 28 GHz are 0.6° and 0.57 dB, the average gain is -4.73 dB and average DC power consumption is lower than 10.5 mW.

並列關鍵字

satellite system ； 5G communication ； Ka band ； vector sum phase shifter ； active coupler ； phase compensation ； variable gain amplifier

參考文獻

[1]林高洲，寬頻衛星通訊系統之運用與展望，Available: http://www.cteccb.org.tw/pdf/IECQ-47-6.pdf

[2]劉輝，衛星通信Ku/Ka雙頻段雙鏈路應，Available: https://read01.com/zh-tw/j4Pz4m.html#.W5e2μm4zapr

[3]雷鋒網，解析5G背後的核心技術：波束成形，Available: https://kknews.cc/tech/aong82g.html

[4]紀鈞翔，滿足5G高頻發展需求:主動式相位陣列天線露頭角，Available: http://www.2cm.com.tw/technologyshow_content.asp?sn=1509250012

[5]D. Kholodnyak, E. Serebryakova, I.vendik and O. Vendik, "Broadband digital phase shifter based on switchable right- and left-handed transmission line sections," IEEE Microwave and Wireless Components Letters, vol. 16, no. 5, pp. 258-260, May 2006.