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  • 學位論文

應用於全晶片奈米積體電路製造電子束微影臨近效應模型建立與修正方法之設計

Design of Proximity Effect Modeling and Correction Methods for Electron-Beam Lithography with Applications in Full-Chip Nanometer Integrated Circuit Manufacturing

指導教授 : 蔡坤諭

並列摘要


Electron-beam–direct-write lithography (EBDWL) is a promising patterning technique due to its negligible electron wave diffraction and maskless nature. Electron scattering degrading patterning fidelity makes proximity effect correction (PEC) necessary. Effectiveness of PEC relies on accurate knowledge of point spread function (PSF) describing absorbed energy distribution (AED) for representing proximity effects precisely. The PSF can be derived via parametric PSF calibration methods typically involving AED fitting. However, the existing method does not employ a systematical approach to obtain a new PSF form that is both compact and accurate when conventional PSF forms are not satisfactory. Only the AED fitting quality (rather than its patterning-prediction quality) is considered during the conventional method. This dissertation proposes a new parametric PSF calibration method to systematically obtain a PSF form comprising the smallest number of terms with a better combination of basis functions, and that optimizes pattern accuracy. Several PEC methods are developed, which can be classified as dose, shape, and combination of dose and shape modulations (i.e., hybrid modulation). Furthermore, these methods can be divided into rule-, model-based, and combination of rule- and model-based approaches (i.e., hybrid approach). However, PEC methods with dose and hybrid modulations tend to need extremely high computational complexity, which is not suitable to achieve full-chip nanometer integrated circuit (IC) manufacturing. In addition, electron scattering interaction between features is not fully considered by rule-based and hybrid-based PEC methods due to their rule-based nature. Therefore, this dissertation proposes a fully model-based PEC method with shape modulation based on optical proximity correction technique, which is relatively applicable to achieve full-chip nanometer IC manufacturing and high correction accuracy. Recently, a new PSF form using a promising PSF calibration method has been developed to more accurately characterize the electron scattering. However, influences of adopting the conventional and new PSF forms for the usage of patterning practical circuit layouts have not been intensively studied. This dissertation extensively investigates impacts of PSF accuracy on patterning prediction and PEC under different resist thickness conditions suitable for various half-pitch nodes, where critical features of practical circuit layouts are used to quantitatively evaluate their performance. In addition, patterning fidelity limitation suffered from proximity effects is examined to determine whether PEC should be applied. EBDW lithography suffers from the low-throughput issue. Although throughput can be improved with lower accelerating voltages and larger beam spot sizes (BSSs) due to increased resist sensitivity and higher permitted current respectively, patterning fidelity is degraded since short-range proximity effects are relatively prominent. Recently, an innovative fully model-based PEC method using edge placement error (EPE) values for correction has been developed to address issues with extremely high computational complexity and potentially low correction efficiency, called EPE-PEC method. However, effectiveness of this method could become insufficient since the EPE values may not be exactly evaluated under larger BSS conditions. An improved fully model-based PEC method directly adopting intensity information (rather than EPE values) is proposed to overcome problems of the EPE-PEC method. Finally, effectiveness of the EPE-PEC method is preliminarily evaluated by experiments, which includes calibration and validation of patterning-prediction model and calculation, implementation, and validation of PEC results.

參考文獻


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