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  • 學位論文

螺旋電感感值計算及多層介質中圖型式接地屏蔽之特性研究

Spiral inductance calculation and the study of inductors with PGS in multilayer dielectric

指導教授 : 盧信嘉

摘要


本論文的第一部份將介紹直線型電感的電感值計算方法,由於在RF被動電路的設計過程中,電感是眾多被動元件中影響整體效能最多的元件,因此,如何精準並且迅速的計算出電感值將是這個領域中最值得的研究的主題之一。為了準確的計算出電感值,我們描述了直線型電感的各項電氣特性並考慮了各項損耗機制,也基於此建構了一個電感等效電路,並利用部分元素等效電路(Partial element equivalent circuit)的原理,開發了一個可以快速地計算出電感的各種電氣特性的模擬計算引擎。 第二部份將展示在單一電感與耦合電感中套用圖型式接地屏蔽(Patterned ground shield)所產生的效果。由於在電感跟基板之間插入一片圖型式接地屏蔽理論上可以削弱電感與基板之間的電耦合與磁耦合因而提升電感的效能,基於此理論,本論文將對各種型態的圖型式接地屏蔽在單一電感與耦合電感上所產生的效果做特性上的研究。本論文在單一電感上套用了五種不同型態的圖型式接地屏蔽,另外在耦合電感上也套用了六種不同的型態。

並列摘要


The first part of this thesis shows the method of calculating the inductance of a rectilinear inductor, since in RF design, on-chip inductor is one of the critical components that dominates the overall performance of the RF devices, thus how to calculate the inductance accurately and immediately becomes an important research topic in this field. In order to calculate inductance as precise as possible, the electrical characteristics of an inductor are carefully analyzed and the loss mechanisms are taken into account. With the proper inductor equivalent circuit and partial element equivalent circuit (PEEC) method, we developed a simulation engine which is capable to predict the inductance and Q-value of an inductor. The second part of this thesis presents the effects on spiral inductors and coupled inductors with the presence of a patterned ground shield (PGS). Inserting a PGS between inductor and substrate eliminates both electric and magnetic couplings to the substrate, and thus enhances the performance of the inductors. Therefore, we would like to study the characteristics of applying various PGS shapes on the spiral inductors and further on the coupled inductors. In this thesis, five PGS structures are used on spiral inductor and six PGS structures are used on the coupled inductors.

參考文獻


[3] C. Patrick Yue, and S. Simon Wong, “On-Chip Spiral Inductors with Patterned Ground Shields for Si-Based RF IC’s,” IEEE Journal of Solid-State Circuits, vol. 33, no. 5, pp. 743-751, May 1998.
[4] Kari Stadius, Mikko Kaltiokallio, and Kari Halonen, “An Automated EM-Simulation Procedure for Generation of Monolithic Inductor Library,” in Proc. European Microwave Conference, vol. 2, pp. 4 , Oct. 2005.
[5] Sheng-Mou Lin, Li-Qun Yang, and Hong-Yang Chang, “Scalable Lumped Model with Multiple Physical Parameters for Embedded Passives,” in Proc. 2005 IEEE Electronic Components and Technology Conference, vol. 2, pp. 1842-1845, May 2005.
[6] H. M. Greenhouse, “Design of Planar Rectangular Microelectronic Inductors,” IEEE Trans on Parts, Hybrids, and Packaging, vol. 10, issue 2, pp. 101-109, June 1974.
[7] Rong Jiang, and Charlie Chung-Ping Chen, “ESPRIT: A Compact Reluctance Based Interconnect Model Considering Lossy Substrate Eddy Current,” in 2004 IEEE International Microwave Symposium (IMS), vol. 3, pp. 1385-1388, June 2004.

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