即時微核心系統之多核執行緒排程機制

異質多核心平台在嵌入式系統的領域裡面被廣泛的應用著，例如行動通訊設備或者娛樂系統等等。針對異質多核心平台的特性，許多研究人員試著將管線排程技術(pipelined schedule technology)移植到這個平台上以增進此平台的系統效能。然而，靜態的管線排程演算法以及對執行時間的估計並無法滿足系統實際執行時的需求。因此，本篇論文提出了一個多核心工作負載共享策略(MCLSP)來解決這個問題。而在最後的效能評估結果中，我們可以證明利用這個策，系統將可有效的降低具有即時性工作的最後期限缺失率(deadline miss rate)以及有效的平衡各核心間的工作負載。此外，本篇論文還提出了一個工作負載搬移機制(thread migration mechanism)來實現在上述異質多核心平台中工作負載共享的目的，此機制並解決了工作負載搬移時可能發生的資料不一致的問題。

關鍵字

管線排程；異質多核心平台；多核心負載共享策略；負載共享；負載平衡；負載搬移；即時排程；過載狀況

並列摘要

Heterogeneous multi-core platforms are now well accepted for designing embedded systems including mobile devices and entertainment system. Many researchers proposed to execute the computation tasks in pipelined manner so as to improve system performance. However, the assumption on worst case execution time and pre-defined schedule make it not feasible to apply pipelined scheduling on open and complex embedded systems. In this thesis, we propose a multi-core load sharing policy, MCLSP, to solve this problem. The performance evaluation results prove the proposed MCLSP could reduce deadline miss rate of real-time tasks and balance the utilization rate of the processing cores as well. After MCLSP decides the target migration workload and the timing of load sharing, a workload migration mechanism should be applied in the system. Therefore, in this thesis, we also propose a workload migration mechanism for the heterogeneous multi-core platforms. And this mechanism can handle the data consistency problem on non-MMU multi-core architecture of this platform.

並列關鍵字

pipelined schedule ； heterogeneous multi-core platform ； MCLSP ； Load sharing/balancing ； Workload migration ； Soft-real time ； Overload situation

參考文獻

[1] Texas Instruments, “Omap applications processors devices from texas instru-

46, May 2010.

2007. Literature Number SPRS238E.

[6] Texas Instruments, “DVEVM Getting Started Guide,” March 2007. Literature

software pipelining for multidimensional loops,” ACMTrans. Archit. Code Optim.,

國際替代計量

即時微核心系統之多核執行緒排程機制

全文下載

主題瀏覽