整合微機電共振器的鎖相迴路設計

CMOS Phase-Locked Loop with Integrated MEMS Resonator

陳帝云(Di-Yun Chen)

指導教授 ： 陳怡然

國立臺灣大學/電機資訊學院/電子工程學研究所/碩士(2010年)

https://doi.org/10.6342/NTU.2010.01768

摘要

使用標準CMOS 0.18微米和CIC MEMS後製程製作微機電共振器，將元件共振模式設計為拉梅模態，可減少共振器因錨點損失降低品質因子，同時使用矩陣排列，對於信號強度有加乘的效果。經由網路分析儀量測共振器的品質因子達到66，相對於積體化電感是來得優異，並且以串聯諧振電路模型取代之，可以放入電路模擬軟體和電晶體電路共同模擬。接著，使用環型振盪器架構，讓訊號迴路在元件共振頻率可符合巴克豪生準則產生振盪，可作為鎖相迴路的參考頻率訊號。微機電振盪器的操作範圍在99MHz~113MHz，相位雜訊在偏移1MHz可低於-133.8dBc/Hz，它的功率消耗為9.3 mW。傳統脈波吞噬計數器含有前置除頻器N/N+1和P、S計數器，導入調控脈波寬度電路取代S計數器，迴路除頻器可簡化為仿真脈波吞噬計數器。
鎖相迴路設計頻段設定在現今最廣為應用的2.4GHz，為符合IEEE 802.11b/g載波間距為20 MHz，在微機電振盪器和相位頻率偵測器之間放置除5電路，並且採用整數型鎖相迴路架構。利用系統模擬制定出迴路頻寬和壓控振盪器相位雜訊規格。壓控振盪器架構使用CMOS交互對，可產生負阻補償電感損失，也易於使電路起振。利用變容二極體和MIM電容微調壓控振盪器的共振腔，將壓控振盪器頻率控制在2400MHz~2480MHz之間，另外，相位雜訊在偏移1MHz可達到-120 dBc/Hz，功率消耗為8.82 mW。最後，晶片面積包含微機電共振器為1.76 mm2，在不計算壓控振盪器緩衝器的功耗，整合微機電共振器的鎖相迴路產生 的功率消耗

關鍵字

微機電共振器 ； 鎖相迴路

並列摘要

At first, we describe the footprint of MEMS resonator, started from a comb-drive resonator, as time gone, now it applied a reference oscillator in frequency synthesizer through SOP. We used TSMC 0.18um 1P6M process to design square-array resonator, and CIC MEMS post-process releases the structure. To reduce anchor loss of the structure, our unit resonator decreases anchors from 4 to 2 and mode shape choices Lame mode. CMOS TIA is placed between square-array resonator and network analyzer to amplify motional signal, and then motional behavior of square-array resonator modeled as series resonant lump element. The Q of square-array resonator measured up to 66, more better than on chip inductor. The MEMS oscillator we use sustaining amplifier and resonator, likes ring oscillator topology, to meet Barkhausen Criterion at resonant frequency. MEMS oscillator operates on 99-113 MHz, its phase noise is -133.8 dBc/Hz at 1 MHz offset, and the power consumption is 9.3 mW. In loop divider, a adjustable pulse width unit is applied to simplify traditional pulse swallow counter, the new one we called pseudo-pulse swallow counter.
The frequency of the PLL focuses on ISM 2.4GHz band, there have many wireless applications such as WLAN, Bluetooth and Zigbee. In order to meet the spacing of carrier, 20 MHz in IEEE 802.11b/g, a prescaler placed between MEMS oscillator and PFD, integer-N PLL chosen as our architecture. We specify loop BW and the phase noise of VCO through ADS. In VCO, we use CMOS type cross-coupled pair to compensate inductor’s loss, makes easy to oscillate. NMOS varactors and MIM capacitors are used to fine tune the resonant tank in VCO, makes sure it working on 2400-2480 MHz, the phase noise is close to -120 dBc/Hz at 1 MHz offset, 8.82 mW is the power consumption. At last, chip area that includes MEMS resonator is about 1.76 mm2, total power consumption is 27.2 mW without VCO buffer.

並列關鍵字

MEMS Resonator ； PLL

參考文獻

[27] The CIC CMOS MEMS Design Platform for Heterogeneous Integration, CIC-CID-RD-08-01

[39] 蘇峰寬，一伏寬頻頻率合成器，國立台灣大學電機資訊學院電子工程學研究所碩士論文，中華民國96年

[1] C. T.-C. Nguyen and R. T. Howe, “An integrated CMOS micromechanical resonator high-Q scillator,” IEEE Journal of Solid-State Circuits, vol. 34, pp. 440–455, Apr. 1999.

[2] S. Lee, M. U. Demirci, and C. T.-C. Nguyen, “A 10-MHz micromechanical resonator Pierce reference oscillator for communications,” in Proc. Int. Conf. Solid-State Sensors and Actuators, Munich, Germany, 2001, pp. 1094–1097.

[3] T. Matilla et. al., “A 12 MHz micromechanical bulk acoustic mode oscillator”, Sensor and Actuators A: Physical ,vol. 101, pp. 1-9, 2002.