原子層沉積之氧化鋅/氧化錫奈米疊層薄膜之薄膜電晶體與熱電特性研究

Atomic layer deposited zinc oxide/tin oxide nanolaminates and its applications in thin film transistors and thermoelectric materials.

洪心寧(Hsin-Ning Hung)

指導教授 ： 蔡豐羽

國立臺灣大學/工學院/材料科學與工程學研究所/碩士(2022年)

https://doi.org/10.6342/NTU202203478

摘要

本文研究了原子沉積技術(ALD)沉積的氧化鋅錫奈米疊層薄膜的沉積溫度、氧化劑種類、前驅物供給方式、層狀堆疊結構、場效電子遷移率以及表面鈍化對熱電性質的影響，關於在ALD氧化鋅錫沉積過程中在異質介面會發生的成長速率減少問題我們可以利用石英晶體監測器及時的觀測發現這個問題源自於兩個機制: (1) 氧化鋅的前驅物二乙基鋅化學吸附在氧化錫的表面上時，二乙基鋅的乙基官能基的反應性會明顯下降、(2)當氧化錫的前驅物四(二甲氨基)錫化學吸附在氧化鋅的表面上時，四(二甲氨基)錫傾向於以錫氧鍵的方式沉積，兩者皆使表面的氫氧官能基密度的減少，造成下一個循環的前驅物沉積量顯著下降。兩個機制在使用比起水更強的氧化劑雙氧水時可以被抑制，而且成長減少的問題可以在多次噴灑雙氧水或是暴露噴灑雙氧水的製程下被完全解決，另外，在雙氧水的使用下，沉積溫度對於成長問題的影響是比較小的。使用最佳化後的參數，也就是鋅錫比例為7:3或是氧化鋅氧化錫循環比例為1:1的非晶質的氧化鋅錫奈米疊層薄膜被作為薄膜電晶體的主動層，並且達成了21.5厘米/伏·秒的高場效遷移率，因為高品質的氧化鋅和氧化錫介面，所有的製程都不需要高溫的後退火。接著關於熱電性質，一奈米的氧化鉿、氧化鋯、氧化鈦、氧化鋁被發現可以大量提升氧化鋅錫薄膜的導電度，這是因為大量氧空缺的引入，其中一奈米的氧化鉿提升熱電功率因數高達六倍，再加上因為非晶質結構以及大量在介面散射的聲子而造成的低熱導率，在室溫下的ZT值可以達到0.025，皆高於氧化鋅與氧化錫的表現。

關鍵字

非晶質金屬氧化物半導體薄膜 ； 氧化鋅錫奈米疊層、 ； 原子層沉積技術 ； 薄膜電晶體 ； 薄膜熱電材料

並列摘要

This study investigated the effects of deposition temperature, type of oxidant precursor, precursor-feeding method, layer-stacking architecture, and surface passivation on the field-effect electron mobility and thermoelectric properties of ZnO-SnO2 (ZTO) nano-laminated thin films prepared by atomic layer deposition (ALD). The growth-reduction issue occurring during the hetero-surface deposition events constituting the fabrication of ALD ZTO nano-laminates was determined through in-situ quartz crystal monitor (QCM) analysis to originate from two mechanisms: (1) reduced reactivity of the ethyl ligands of diethylzinc (DEZn)—a precursor for the ALD ZnO process—upon DEZn’s chemisorption on a SnO2 surface; (2) high tendency of tetrakis(dimethylamido)tin (TDMASn)—a precursor for the ALD SnO2 process—to form -Sn-O-Sn- bridges upon TDMASn’s chemisorption on a ZnO surface. Both mechanism results in lowering of surface -OH density which made the number of precursor molecules deposited on the surface in the next cycle decrease. Both mechanisms were found to lessen with the use of a stronger oxidant precursor, H2O2 as opposed to H2O, whose dosage could be optimized through a discrete feeding and an exposure-feeding method, enabling complete resolution of the growth-reduction issue; the deposition temperature showed little effects on growth reduction when H2O2 was used. Using the optimized process settings, amorphous ZTO nano-laminated thin films with a 7:3 Zn:Sn ratio were fabricated with a 1:1 ZnO:SnO2 cycle ratio, which yielded a high field effect mobility of up to 21.5 cm2V-1s-1 as a channel layer in a thin film transistor (TFT) device without needing a high-temperature annealing process step, thanks to the high ZnO-SnO2 interface quality of the ZTO nano-laminates obtained through the elimination of the growth-reduction phenomenon. In terms of thermoelectric properties, an in-situ ALD passivation method involving capping the ZTO nano-laminates with a ~1 nm-thick layer of various oxides including HfO2, ZrO2, TiO2, Al2O3 was discovered to significantly increase the ZTO films’ electrical conductivity through the passivation layer’s induction of oxygen vacancies in the ZTO films. Specifically, a 1 nm HfO2 passivation layer increased the power factor of the ZTO nano-laminates by six-folds, which coupled with the ZTO nano-laminates’ low thermal conductivity owing to their amorphous nature and abundant phonon-scattering interfaces resulted in a room-temperature ZT value of 0.025, a substantial improvement over those of ZnO and SnO2 films.

並列關鍵字

amorphous metal oxide semiconductor, zinc tin oxide ； nano-laminates ； atomic layer deposition ； thin film transistor ； thin film thermoelectric

參考文獻

(1) Hosono, H.; Yasukawa, M.; Kawazoe, H. Novel oxide amorphous semiconductors: Transparent conducting amorphous oxides. Journal of non-crystalline solids 1996, 203, 334-344.

(2) Nomura, K.; Ohta, H.; Takagi, A.; Kamiya, T.; Hirano, M.; Hosono, H. Room-temperature fabrication of transparent flexible thin-film transistors using amorphous oxide semiconductors. nature 2004, 432 (7016), 488-492.

(3) Nathan, A.; Lee, S.; Jeon, S.; Robertson, J. Amorphous oxide semiconductor TFTs for displays and imaging. Journal of Display Technology 2013, 10 (11), 917-927.

(4) Chiang, H. Q.; Wager, J. F.; Hoffman, R. L.; Jeong, J.; Keszler, D. A. High mobility transparent thin-film transistors with amorphous zinc tin oxide channel layer. Applied Physics Letters 2005, 86 (1). DOI: 10.1063/1.1843286.

(5) Allemang, C. R.; Cho, T. H.; Trejo, O.; Ravan, S.; Rodríguez, R. E.; Dasgupta, N. P.; Peterson, R. L. High‐Performance Zinc Tin Oxide TFTs with Active Layers Deposited by Atomic Layer Deposition. Advanced Electronic Materials 2020, 6 (7). DOI: 10.1002/aelm.202000195.