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  • 學位論文

適用於經銅線傳輸百億位元乙太網路類比前端的等化濾波器

An Equalizing Filter for the Analog Front-End of 10GBASE-T Ethernet System

指導教授 : 李泰成
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摘要


經銅線傳輸的百億位元乙太網路系統為下一世代的的乙太網路系統,傳輸速率可 達每秒百億位元。由於通道的非理想性,傳輸速率及距離受到限制,也使得設計 傳輸距離長達一百公尺的銅線傳輸百億位元乙太網路系統時遭遇相當大的挑 戰。數位信號處理技術的發展十分迅速,因此數位電路提供了良好的等化以及干 擾消除功能來補償通道的非理想性,而類比電路僅提供可變增益放大、抗混淆濾 波及資料轉換等功能。然而,如果在類比的範圍加入如部分等化等功能,將可提 升百億位元乙太網路系統收發機的效能,同時也能簡化硬體的複雜度。 在本論文中,我們設計了一個適用於經銅線傳輸的百億位元乙太網路系統的 等化濾波器。由整個系統角度的分析,考慮整體效能及實作可行性,並比較了幾 種不同的濾波器響應後,發現具二極點的濾波器最適合此應用。此濾波器並具有 可調式增強,以及可調式低頻增益的功能。在電路實作上,使用0.13 微米互補 金氧半導體製程製作了一個固定電容技巧的二階轉導電容濾波器。此等化濾波器 可成功地回復經銅線傳輸的百億位元乙太網路系統的信號;在1.2 伏電源下消耗 了7.95~17.55 毫瓦的功率。此電路的主動面積為0.4 x 0.1 毫米平方。

並列摘要


10GBASE-T is the next-generation 10Gbps copper cable Ethernet network. In the design of 10GBASE-T system transmitting over up to 100 meters of a standard CAT-6 cable, the channel impairments become a major challenge, limiting the achievable transmission speed and distance over channels. With the rapid development of DSP technology, digital circuits offer accurate equalization and interference cancellation to compensate for channel impairments while analog circuits perform variable-gain amplifying, anti-aliasing filtering and data conversion. However, if some additional function such as partial equalization is included in the analog domain, the performance of 10GBASE-T receiver can be further improved and the hardware complexity can be simplified as well. In this thesis, an equalizing filter for the analog front-end of 10GBASE-T Ethernet system is proposed. An evaluation from a systematic point of view is carried out to compare several filter responses and conclude that two-pole filter is most suitable one considering the overall performance and practicability. The filter also V exhibits programmable boost and programmable low-frequency gain. A second-order gm-C filter utilizing constant capacitance technique has been implemented in a 0.13-μm CMOS technology. The equalizing filter can successfully recover 10GBASE-T transmitted signals while dissipating 7.95 ~ 17.55 mW from a 1.2-V power supply. The active area of the design is 0.4 × 0.1 mm2.

參考文獻


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