利用陷阱模型研究鍺奈米晶體金氧半結構

A Study of Metal-Oxide-Semiconductor Structure with Embedded Ge Nanocrystals by Using a Trap Model

呂紹維(Shau-Wei Lu)

指導教授 ： 管傑雄

國立臺灣大學/電機資訊學院/電子工程學研究所/碩士(2005年)

https://doi.org/10.6342/NTU.2005.00924

摘要

本研究採用單一能階的陷阱模型研究金氧半結構包含鍺奈米晶體 (Ge nano-crystals) 中由淺缺陷 (shallow trap) 所造成的電荷交換 (charge exchange) 和電荷流失 (charge loss) 的動態行為，利用變頻的電容－電壓和電導－電壓技術來量測。在元件製作上，則利用兩種方法來製作鍺奈米晶體。首先，使用超高真空化學氣相沉積 (UHV/CVD)在二氧化矽上形成鍺奈米晶體。一開始使用SiH4在二氧化矽表面上沉積隨機分布的矽原子核 (Si nuclei)，接著通入GeH4氣體，其選擇性喜歡在矽原子核上形成鍺奈米點。另外採用一種物理氣相沉積的方法來製作鍺奈米晶體。也就是利用電子槍蒸鍍機 (E-gun evaporator) 在熱二氧化矽上形成一層非晶鍺薄膜後再經過高溫爐的退火來達成鍺奈米晶體。從SEM及HRTEM影像得知，我們確實觀察到結晶化的鍺奈米晶體埋在二氧化矽中。
從電容－電壓的量測上，其結果顯示出利用超高真空化學汽相沉積及電子槍蒸鍍機所形成的元件上明顯看到逆時針遲滯現象，指出電荷儲存在元件中的行為。由電荷保存特性來看，由超高真空化學氣相沉積所形成的鍺奈米晶體，在經過高溫熱退火 (PDA) 後,其電荷保存的特性有明顯的改善。而利用蒸鍍法所形成的鍺奈米晶體，我們發現在乾氧中比在氮氣中所形成之鍺奈米晶體有較好的電荷保存的特性。
對於電荷流失和電荷交換的機制，我們採用了一個由Nicollian 和 Goetzgergen基於SRH理論所提出的單一能階陷阱模型，在本研究中另外引入ㄧ個電荷流失常數來研究淺缺陷對元件的影響。因此，在本模型中有兩個時間常數。原先模型中的電荷交換時間常數表示經由缺陷與外部電路做載子交換行為所需的時間。而另一個時間常數表示由於載子以hopping 的行為經由周圍的缺陷流失形成另外漏流的路徑。我們首先量測變頻電容與電導對電壓的關係。利用本模型來比較元件經過PMA和沒經過PMA處理對電荷流失時間常數的變化。再藉由陷阱電容 (Trap capacitance) 跟電導 (Trap conductance) 求出進而求出電荷交換和電荷流失的時間常數。本研究中認為在包含奈米晶體的元件中其由淺缺陷或奈米晶體中的淺能態 (shallow states) 和矽基板間電荷交換的行為是在交流訊號調變下以thermal-assisted tunneling的方式做交換，這是不同於金氧半結構中介面能態和矽基板直接以產生－複合方式做交換。從10K Hz到1M Hz的導納量測上， 其時間常數所計算出的範圍介於10-4到10-7 秒，其範圍屬於短時間電荷常數。本研究所計算出的範圍是屬於淺缺陷的部份。在經過PMA後的元件，由於淺電荷的修復使得傳導路徑得以被抑制導致較少量的電荷做交換而看到較小的陷阱電容和電導。在經過PMA後的元件擁有較大的電荷流失時間常數，其元件中較淺的缺陷大部分被修復了，使得電荷藉由trap-assisted tunneling 的傳導機率的降低，讓電荷流失時時間常數增加。從電荷保存的特性 (retention) 來看，其經過PMA的樣品並無法從明顯的改善，其原因來自電荷主要儲存在深缺陷或奈米晶體的深能態中，吾人認為從我們的量測只能得到的是淺缺陷所導致的較短電荷流失常數，而電荷保存特性是針對深缺陷 (deep traps) 或奈米晶體中更深的能階所顯示的結果。

關鍵字

陷阱 ； 鍺奈米晶體 ； 金氧半 ； 非揮發性記憶體

並列摘要

In this work, we utilize a single-level trap model to study impact of the shallow traps, resulting in dynamic behavior of charge exchange and charge loss mechanism in a MOS capacitor containing germanium nano-crystals (Ge NCs) performed by using frequency dependence capacitance-voltage (C-V) and conductance-voltage (G-V) measurement. Firstly, we present a study on the fabrication process of Ge NCs embedded in SiO2 matrix where the Ge NCs are grown by a two-step process in the UHV/CVD system. Si nuclei are first deposited on SiO2 surface. Then, Ge is selectively grown on the Si nuclei. Secondly, we also use a PVD method to synthesize the Ge NCs. They are formed by furnace annealing to an E-gun evaporated ultra-thin Ge layer at 900oC for 300 s in a dry N2 or O2 ambient. From SEM and HRTEM measurements, we ensure that Ge NCs are exactly pronounced.
From C-V measurement, the devices formed by the above two methods both show counterclockwise hysteresis phenomena, indicating charge storage effect clearly. For the characteristics of charge retention, the devices which are grown by the first method after PDA treatment show improvement. In addition, the ones formed by the second method with the condition in a dry O2 ambient to E-gun evaporated Ge layer shows even better retention characteristic compared to the ones formed by the same method but under the condition of a dry N2 ambient.
We also utilize a single-level trap model based on SRH theory and introduce an additional charge loss time constant in the model. Hence, there are two time constants in our model. The exchange time constant in original model indicates the time needed fro the trap to exchange the carriers with the external circuit. The other represents the additional charge loss path due to the hopping of carriers in the adjacent traps. We utilize our trap model to compare the characteristics of charge exchange and charge loss between the devices with/without PMA treatment. The behavior of charge exchange between shallow states of NCs/traps and Si substrate is by way of thermal assisted tunneling differently from pure MOS structure by way of directly generation and recombination process .Trap capacitance and trap conductance in the device without PMA treatment is larger than that with PMA treatment. The result suggests the defects or surface states around Ge NCs are annealed out by PMA treatment, resulting in smaller amount of communication of charges between NCs/traps caused by the reduction of conductive paths. The charge loss time constant for the devices with PMA treatment is larger than that for the device without PMA treatment due to the reduction of surface state density or oxide defects around Ge NCs, resulting in the suppression of trap-assisted tunneling through the tunnel oxide to decrease the charge loss behavior. During PMA treatment, the charge retention is not obviously improved due to the charges storing in the deeper traps or deeper states in NCs. From the admittance measurement between 10K Hz and 1M Hz , we could just estimate the time constant between 10-4 and 10-7 seconds and the order of magnitude belongs to the short time constant. Therefore, we can detect the magnitude of the time constant associated the depth of the shallow traps from 10-4 to 10-7 seconds. From our admittance measurement, we can only obtain the shorter time constant arising from shallow traps while the measurement of charge retention focuses on the results from deeper traps or deeper states in the NCs.

並列關鍵字

trap ； Ge nanocrystals ； MOS ； nonvolatile memory

參考文獻

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