不會造成責任週期飽和且符合暫態響應要求的電壓調整模組之新式最佳控制器設計方法

A New Optimal Controller Design Method for Meeting Transient Response Requirements of Voltage Regulator Modules without Duty Ratio Saturation

曾宇鋕(Yu-Jhih Zeng)

指導教授 ： 蔡坤諭

國立臺灣大學/電機資訊學院/電機工程學研究所/碩士(2012年)

https://doi.org/10.6342/NTU.2012.10670

摘要

傳統的電壓調整模組設計在負載暫態期間遭遇到責任週期飽和的問題。這個問題可以被增加輸出電容所減緩，但將會導致使用一個較大的面積；減少電感則會引起功率消耗。此外，在頻率上的線性控制器設計會變得複雜，原因是主動下垂控制方法會使電壓與電流迴路相互衝突。這個問題可以被負載電流前饋偵測方法配合考慮寄生元件的精準小訊號模型來解決。然而，它是困難在於使用數學推導的方式來建立小訊號模型。在這個論文，電壓調整模組使用了系統識別的技術、模型匹配方式之線性控制器的設計、線性矩陣不等式的最佳化和前饋強健控制方法，來避免責任週期飽和問題與簡化雙迴路控制結構。使用了我們所提出的方法巳被證實在電壓調整模組設計上可以符合電壓調整(版本11.1)大部份要求。

關鍵字

電壓調整模組 ； 電壓調整下垂 ； 系統識別 ； 線性矩陣不等式最佳化 ； 強健控制

並列摘要

Traditional design of voltage regulator modules (VRMs) has encountered duty-ratio saturation during load transient. This problem can be alleviated by increasing the output capacitances, which will lead to a larger board area, or by decreasing the inductances, which can cause power loss. Furthermore, linear controller design in the frequency domain becomes complicated because the voltage and current loops of the active droop control method may conflict with each other. This problem can be solved by the load-current feedforward estimation approach with an accurate small-signal model considering parasitic elements. However, it is difficult to develop accurate small-signal models using mathematical derivation. In this paper, VRM modeling using system identification techniques and linear controller design using model matching, linear matrix inequality optimization, and feedforward Hinf control techniques are proposed to prevent the duty-ratio saturation and simplify the multi-loop control structure. It has been demonstrated that the VRM design using the proposed methodology can satisfy the most of VR11.1 requirements.

並列關鍵字

VRM ； VRD ； system identification ； LMI optimization ； robust control.

參考文獻

[1] G. E. Moore: Electronics 38 (1965) 114.

[2] Voltage Regulator Module (VRM) and Enterprise Voltage Regulator Down (EVRD) 11.1 Design Guide: Intel, Sep. 2009.

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