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  • 學位論文

具有寬頻雜訊抑制能力之混合式光子晶電源層設計及電源完整性分析

A Hybrid Photonic Crystal Power Ground Layer (H-PCPL) with Broadband Noise Suppression

指導教授 : 吳宗霖

摘要


本篇論文著重在探討印刷電路板中的雜訊抑制機制。首先針對各種傳統之雜訊抑制方法加以討論及優缺點分析,之後提出一種光子晶體電源層結構,藉由頻帶圖以及色散圖的分析方式,可以更準確及有效率的預測出光子晶體的截止頻帶,並設計出所需要的截止頻帶位置。論文出提了理論分析,數值模擬以及實際電路板的製做,模擬與量測結果有相當好的一致性,最後另有電路元件的實際測試,可以看出此結構確實有絕佳的雜訊抑制效果。

並列摘要


This thesis focuses on the isolation of power/ground bounce noise (P/GBN) and suppression of simultaneous switching noise (SSN) in high-speed circuits. A hybrid photonic crystal power/ground layer (H-PCPL) is proposed to efficiently eliminate the noise. Based on the previous PCPL design, we use two kinds of photonic crystals to synthesis several bandgaps to form a continuously broad bandgap. A sequence of designing photonic bandgaps is investigated; first we fix the radius of the dielectric discs and vary the lattice constant, which can enhance the photonic bandgap but could not get a continuous stopband. Then we use two types of dielectric discs with different radii. The bandgaps can compensate each other and get a continuous stopband ranging from 3 to 9.6 GHz. Real-frequency gapmap is used here to analyze and estimate the bandgap structure, for the hybrid PCPL. H-PCPL are fabricated on Rogers/RT Duroid 5880 and good agreement is shown between the measurement and simulation results. Two noise isolation structure, H-PCPL and the conventional split power plane, are compared here, and the H-PCPL shows better signal integrity performance than the split power plane besides wider stopband for noise isolation. Demonstration of noise isolation on digital circuits is shown in the last section.

參考文獻


[1] T. L. Wu, Y. H. Lin, J. N. Hwang, J. J. Lin, “The effect of test system impedance on measurements of ground bounce in printed circuit boards,” IEEE Trans.Electromagn. Compat., vol. 43, pp. 600-607 May 2001.
[2] G.-T. Lei, R. W. Techentin, and B. K. Gilbert, “High frequency characterization of power/ground-plane structures,” IEEE Trans. Microwave Theory Tech., vol. 47, pp.562–569, May 1999.
[3] S. Radu and D. Hockanson, “An investigation of PCB radiated emissions from simultaneous switching noise,” in Proc. IEEE Int. Symp. Electromagn. Compat.,pp. 893–898, 1999.
[4] K. Ren, C. Y. Wu, and L. C. Zhang, “The restriction on delta-I noise along the power/ground layer in the high speed digital printed circuit board,” in Proc. IEEE Int. Symp. Electromagnetic Compatibility, Colorado, USA, Aug. 1998, pp. 511-516.
[5] S. Van den Berghe, F. Olyslager, D. De Zutter, J. De Moerloose, and W. Temmerman, “Study of the ground bounce caused by power plane resonances,” IEEE Trans. Electromagn. Compat., vol. 40, May 1998, pp. 111-119.

被引用紀錄


吳冠宗(2008)。具有電源雜訊抑制效果之新式低成本光子晶體電源層實作結構〔碩士論文,國立臺灣大學〕。華藝線上圖書館。https://doi.org/10.6342/NTU.2008.00467

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