低功率最佳化降頻轉換器與正交不匹配消除之研究

Research of Down-Converter on Low-Power Optimization and IQ Mismatch-Eliminated Technique

黃皓瑋(Hao-Wei Huang)

指導教授 ： 黃天偉

國立臺灣大學/電機資訊學院/電信工程學研究所/碩士(2011年)

https://doi.org/10.6342/NTU.2011.10614

摘要

本篇論文，首先介紹混波器在毫米波無線收發機的功用，同時探討混波器幾個重要的參數，由於混波器在毫米波系統上，是個不可或缺的子電路，因此，在系統的考量上，混波器的特性必須加重被考慮，從基本的混波器開始，並且介紹各種混波器的架構與其優缺點，進而延伸至由混波器組成的正交解調器，在非理想效應下對系統的干擾做探討與補償方案。
因應大紘股份有限公司所示出的專題，簡要介紹60GHz收發機系統之規畫，各參數之說明，架構的選取，並且以穩懋提供之0.15um low noise pHEMT研製60GHz 次諧波雙向混波器，詳細的設計流程，電晶體選取，微小化之等效濾波器之設計，阻抗之匹配。A V-band anti-parallel pair diode sub-harmonic mixer in 0.15um pHEMT，60GHz 之轉換損耗為10dB，IF頻寬為4GHz，2LO-到-RF隔離度為45dB以上，線性度之輸出1dB壓縮點為-8dBm。
從台積電提供的CMOS製程設計混波器，針對混波器的本地振盪功率參數著墨，在毫米波的積體電路實現上，欲獲取較大輸出功率時會直接反應在較大的直流功耗，操作頻率越高時，製程的限制使輸出功率彌足珍貴，為了保持在驅動電路低功率輸出下混波器還能有良好之特性，做了不同架構的晶片實現。A Ka-band之differentially bulk-source driven mixer in 0.18um CMOS，在本地振盪功率-11dBm之下，其24 GHz之轉換增益為2dB，LO-到-RF隔離度大於50dB，直流功耗為1.5毫瓦。基於此bulk-source混頻器IF頻寬只有200MHz與基頻緩衝器不穩定，A redesign Ka-band bulk-source driven with pseudo PMOS IF buffer，使IF頻寬提升至600MHz，且混頻器中心操作頻率更接近目標頻率。
第三部分，介紹由混波器組成的正交解調器。正交解調器是微波系統的重要架構，也是現行無線通訊積體電路中之核心元件之一，在追求高速率傳輸的無線前端電路設計上, 往往採用正交形式的解調器來增加位元傳輸速率，具有極高的附加價值。然而正交解調器存在非理想效應，振幅相位不匹配效應，此不匹配會造成信號在基頻的錯誤, 因此往往EVM and constellation的好壞與正交平衡的程度有很大的關係。為了解決不匹配問題，諸多文獻已發表提供各種校正方法，以簡化複雜度為前提，本次實驗設計出具有較低複雜度可調整振幅相位的解調器。A 24 GHz down-converter with Tunable Amplitude and Phase Compensated in 0.18um CMOS Process，24 GHz之轉換增益為5dB，振幅相位補償前的sideband suppression為24dBc，補償後為45dBc，增進了20dBc以上，補償機制直流功耗不超過15毫瓦。
最後為附錄部分，因應於802.11.ad之規劃，每個頻道頻寬為2.16GHz，應用在低IF的無線通訊前端電路上，設計出具有低相位的衰減器，0.05~4GHz low-phase error attenuator in 90nm CMOS，最大衰減量為37dB其相位錯誤在3以下，在通道頻寬2.16GHz之下, 輸入輸出返回損失皆大於10dB。

關鍵字

混頻器 ； 低功率 ； 降頻轉換器 ； 不匹配 ； 衰減器

並列摘要

In this thesis, the first is introduction to millimeter-wave mixers in the wireless transceiver application and discussed several important parameters that observed in mixers. The mixers are essential component in the millimeter wave systems, therefore, considerations on the system, the mixer performance must be considered carefully. The basic mixer, and introduce a variety of mixers and their advantages or disadvantages of the structure, and then extended to the quadrature demodulator that composed of the mixers. Furthermore, focus on non-ideal effects of the demodulator and implemented the compensation work.
For Airwave Corporation released a 60GHz transceiver project. A brief described system plan, the selection of architecture, and each important parameter. The process provided by WIN Development of 0.15um low noise pHEMT. A sub-harmonic mixer has been designed. The detail of the selection of the transistor size, the equivalent miniaturized filter, and impedance matching are investigated interestingly. A V-band anti-parallel pair diode sub-harmonic mixer in 0.15um pHEMT was designed and measured, which appears 10-dB of the conversion loss and owns 4 GHz intermediate frequency (IF) bandwidth at 60 GHz radio frequency(RF). The 2LO-to-RF isolation is more than 45-dB, and the linearity of the output power 1-dB compression point is -8dBm, as well no DC power required.
As complementally metal-oxide semiconductor (CMOS) process provided from TSMC was designed in monolithic microwave integrated circuits (MMIC). The mixer required a local oscillator signal to converse up or down the carrier frequency. Among the mixer several specifications, the local oscillator power is valuable in the millimeter-wave integrated circuit. The desire for greater output power will be directly related in the larger DC power consumption. As operating to higher frequency, the process limited the output power is too precious to difficulty drive the mixers while still maintains the performance such as conversion gain properties. To overcome the limit, implemented the low-LO power mixers. A Ka-band of the differentially bulk-source driven mixer in 0.18um CMOS was implemented. The measurement of the mixer required only -11-dBm of the local oscillator power while achieved 2-dB of the conversion gain at the 24 GHz frequency as well as 1.5mW of the DC power consumption. Furthermore, due to the narrow IF frequency bandwidth, operation frequency shifted, and unstable IF buffer in above work. A redesign Ka-band bulk-source driven mixer in 0.18-um CMOS was designed, which improves the IF bandwidth to 600MHz, center operation frequency to 22 GHz and IF buffer stabilized.
The third part describes the quadrature demodulator which composed of two the unit down-conversion mixers. The quadrature demodulators play an important role in microwave systems. It is also one of the core components in the pursuit of high-speed wireless transmission system on recently wireless communication development. It often in the form of the orthogonal demodulator to increase the data bit transfer rate, which has a high added worth in transceiver architecture. However, there are non-ideal effects in the quadrature demodulators, which are the amplitude and the phase mismatch. The mismatch occurs from I/Q amplitude and phase balance can directly cause the error signal at baseband. In reality, observes the error vector magnitude (EVM) or constellation has been regarded as demodulation good or bad. In order to solve the mismatch problem, many papers has been published to provide several calibration methods. To simplify the complexity of the premise, this experiment has a lower complexity to accomplish amplitude and phase controlled technique so that adjust the mismatch effects. A 24 GHz down-converter with Tunable Amplitude and Phase Compensated in 0.18 um CMOS Process was designed. The down-converter achieves 5-dB of the conversion at 24 GHz frequency. Before amplitude and phase compensated the sideband-suppression is 24-dBc. After compensation, the sideband-suppression is improved to more than 45dBc, enhanced above 20dBc. The DC power of the compensation technique consumes 15mW at most.
The last part is attenuator in appendix, for the 802.11.ad planning, each channel bandwidth is 2.16GHz. To use in low-IF front-end circuits for wireless communications, design a low phase error of the attenuator. A 0.05 ~ 4GHz low-phase error attenuator in 90nm CMOS was designed. The measurement of the maximum attenuation is 37-dB all under the 3o of the phase error, and the bandwidth is from 50-MHz to 4 GHz. The good input and output return loss are more than 10-dB under the channel bandwidth 2.16 GHz.

並列關鍵字

mixer ； low-power ； down-converter ； mismatch ； attenuator

參考文獻

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