- 學位論文
低功率頻率調變接收機適用於 315/433/868/915MHz ISM 頻帶
Low Power FSK Receiver for 315/433/868/915MHz ISM Band
摘要
本篇碩士論文提出一個適用於低資料傳輸、低功率消耗、低成本無線感測網 路的接收機。此接收機支援頻率移鍵(FSK)資料格式並可操作在免申請使用執照的 315/433/868/915MHz 無線電頻段。接收機採用 Low-IF 的架構已達到低功耗高效 能和小面積的目的。此外，接收機利用 Balun 架構的低雜訊放大器實現全雙端型 式以抑制電源和基版所造成的雜訊。 接收機由下列幾個電路區塊所構成：低雜訊放大器、混波器、多相位濾波器、 和延遲鎖相迴路形式的解調器。電路使用的低功率的電路設計技巧包括：平行連 接低雜訊放大器的輸入端以降低輸入阻抗匹配的要求、電流重複使用和電流注入。 另外，延遲鎖相迴路形式的解調器可以避免諧波失真的問題以更進一步的降低基 頻電路的功率消耗。射頻前端電路提供 13dB 的增益和 315~915MHz 的輸入阻抗 匹配，並消耗 15mW。基頻電路包含了限制放大器和解調器，功率消耗為 6mW， 在資料傳輸速率為50kbps 和 0.1% bit error rate (BER)時，達到-55dBm 的靈敏度。 最後，整個接收機在 315/433/868/915MHz，資料傳輸速率為 50kbps 和 0.1% bit error rate (BER)時，可達到-65dBm~-63dBm 的靈敏度。接收機晶片面積為 2.5 mm2 ， 總功率消耗為 20.9mW。
並列摘要
This thesis presents a receiver implemented in 0.35 um CMOS technology suitable for low data rate, low power, low cost wireless sensor networks. The receiver operates in the license-free ISM frequency bands at 315, 433, 868, or 915MHz and supports FSK modulation data formats. The proposed receiver adopts low-IF architecture in order to achieve low power consumption and high performance with small chip area. In addition, the receiver uses a balun LNA to realize a fully differential structure to suppress supply noise and substrate noise. The building blocks of receiver include a low-noise amplifier, mixer, polyphase filter, and DLL-based demodulator. Low power circuit design techniques are employed: parallel combination at LNA input stage to relax matching requirement, current reuse, and current bleeding. Also, a DLL-based demodulator without harmonic distortion further reduces power consumption in the baseband block. The RF front-end circuit provide 13dB voltage gain and wide band input matching from 315~915MHz with 15mW power consumption, while the baseband circuits dissipate 6mW. In sum, receiver circuit achieves a sensitivity of -65dBm ~ -63dBm at 0.1 % BER with 50 kbps data rate. The receiver total chip area is 2.5 mm2 and consumes 20.9mW.