適用於多頻帶正交多工超寬頻系統之互補式金氧半頻率合成器設計

Design of CMOS Frequency Synthesizer for MB-OFDM UWB Systems

陳志浩(Chih-Hao Chen)

指導教授 ： 汪重光

國立臺灣大學/電機資訊學院/電子工程學研究所/碩士(2005年)

https://doi.org/10.6342/NTU.2005.01228

摘要

超寬頻系統是目前最為熱門的系統之一。對於未來整合化的無線個人區域網路的趨勢之下，超寬頻系統無疑的為一個最佳的解決方案。雖然系統的標準尚未確定，但其中的多頻帶正交多工超寬頻系統已成為下一代無線通用串流匯流排的標準，而多頻帶正交多工超寬頻系統的頻帶從3432到10296MHz一共被分為14個副頻帶，目前所提出的接收機都只能用於前三個頻帶，對於多頻帶正交多工超寬頻系統，一個能夠產生此14個副頻帶的頻率合成器能讓可操作於所有頻帶的接收機提早實現。
本論文介紹了兩個適用於此正交多工超寬頻系統與一個可用於未來高速傳輸的積體電路晶片。第一顆晶片是以0.18μm 1P6M CMOS製程完成的在正交多工超寬頻系統第三和第四頻帶之間的壓控振盪器，此壓控振盪器的模擬結果，可以提供4752MHz的振盪信號，晶片的面積為955 X 831μm2，在1.8伏特的電壓下總消耗功率為 13.8 mW。
第二顆晶片是一個可以模擬結果可以操作在40GHz的多相位壓控振盪器，此晶片是以0.18μm 1P6M CMOS的製程完成的，晶片面積為1180 X 801μm2，在1.8伏特下可產生八個相位，其消耗總功率為16 mW，最後一個是可以產生多頻帶正交多工超寬頻系統所需的14個頻帶的頻率合成器，此合成器利用提出的架構和注射鎖定式頻帶選擇強化器產生的14個頻帶皆可由外在信號來做切換，以0.18μm 1P6M CMOS的製程完成，在1.8伏特下總消耗功率為95 mW。而前兩顆晶片都經過佈局後模擬驗證，晶片的測試考量和量測結果也會一併呈現並討論之。

關鍵字

超寬頻 ； 頻率合成器

並列摘要

Recently, UWB is the one of the most popular systems. Under the trend of future integration of WPAN, UWB system is the best solution undoubtedly. Though the standard of UWB is not finalized, MB-OFDM UWB system has been the standard of next generation wireless USB. The bandwidth of MB-OFDM UWB from 3432 to 10296 MHz is divided into 14 sub-bands. The proposed transceivers for UWB are only operated in band # 1 to band # 3 so far. For MB-OFDM UWB system, a frequency synthesizer to generate clocks for 14 sub-bands will be beneficial to the realization of UWB transceiver for all sub-bands.
This thesis presents two chips for MB-OFDM UWB system and a chip for future high-speed transmission. The first chip is VCO for the frequency between band # 3 and # 4 in MB-OFDM UWB system with 0.18μm 1P6M CMOS. The simulation shows the chip can generate oscillation signals in 4752 MHz. The chip area is 955 X 831 μm2. The power consumption is 13.8 mW under 1.8V power supply.
The second chip is a multi-phase VCO operated in 40 GHz in simulation. It was fabricated in 0.18μm 1P6M CMOS. The chip occupies area of 1180 X 801 μm2 . It can provide eight phase oscillation signals under 1.8V power supply, and consume 16mW.
The final chip is a frequency synthesizer whose generated clocks can demand the all 14 sub-bands in MB-OFDM UWB system. With proposed architecture and injection-locked band-selection enhancer, the synthesizer can provide clocks in all 14 bands and band selection by external signals.
It was achieved in 0.18μm 1P6M CMOS. The occupied area is, and the synthesizer consumes 95 mW under 1.8V power supply. Former two chips are verified by post-simulation. The considerations of testing and measurement results of them will be shown and discussed.

並列關鍵字

Ultra-Wideband Systems ； Frequency Synthesizer

參考文獻

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