應用於微波及毫米波金氧半場效電晶體壓控振 盪器之研製

Design of Microwave and Millimeter-wave CMOS VCOs

卓宜賢(Yi-Hsien Cho)

指導教授 ： 王暉

國立臺灣大學/電機資訊學院/電信工程學研究所/碩士(2005年)

https://doi.org/10.6342/NTU.2005.01588

摘要

現代通訊系統中，低相位雜訊的壓控振盪器是不可或缺的元件，由於高資料傳輸量的需求，促使我們研究高頻的通訊系統，因此，如何設計高頻率並同時具有低相位雜訊的振盪器是一個值得探討的重點。
本論文的主題在於使用金氧半互補式製程，設計並實現微波及豪米波振盪器，研究的方向著重於毫米波振盪器及應用於5 GHz頻段的正交輸出振盪器。論文主要可分為三大部分，第一部份介紹振盪器的應用並討論LC型振盪器的原理，同時實現一個互補式的LC型振盪器，第二部份描述雙推式振盪器的原理及優點，並且提出一個改良的架構來降低相位雜訊。論文的最後一部分主要在討論正交輸出振盪器的原理及應用，本論文提出三個新型的正交(quadrature)輸出振盪器,並說明其設計概念與優缺點。
在本論文中，我們提出一個結合互補式交越耦合(complementary cross-couple)與雙推式架構的振盪器，並使用台積電0.18微米製程，成功地實現了一個52 GHz雙堆式振盪器。此晶片的面積僅有0.2平方微米，其相位雜訊在1-MHz位移為 -97 dBc/Hz。
除了高頻振盪器，應用於5 GHz頻段的正交輸出振盪器亦是本論文的探討重點。首先我們設計一個可切換頻帶的寬頻正交輸出振盪器，並且使用台積電0.18微米製程來實現，電路的主要架構是藉由串聯耦合電晶體來耦合兩個互補式交越耦合振盪器。由量測結果顯示，此電路在5.5 GHz、1-MHz位移(offset)時具有-120 dBc/Hz的相位雜訊並且具有20%的頻率調整範圍。由於柯畢茲振(Colpitts)盪器具有比交越耦合振盪器較佳的相位雜訊，因此，我們以柯畢茲振盪器為核心設計一個新型的振盪器來降低相位雜訊，並且藉由並聯耦合的方式來實現正交相位輸出，然而，由於並聯耦合的方式會降低整各電路的相位雜訊及增加功率消耗，因此，此電路沒有表現出比串聯耦合振盪器較佳的相位雜訊。最後，我們提出一個新的耦合技巧來設計柯畢茲正交輸出振盪器。此一電路具有低功率消耗低相位雜訊的優點。由模擬結果，此電路僅消耗6毫瓦功率並且在5 GHz、1-MHz位移時具有-123 dBc/Hz的相位雜訊。

關鍵字

金氧半場效電晶體 ； 振盪器 ； 正交

並列摘要

A low phase noise VCO is indispensable in modern communication systems. The demand for high data transmission drives us to investigate high frequency systems. Therefore, to design a high frequency oscillator with low phase noise is important.
The goal of the thesis is to design and implement VCOs in microwave and millimeter-wave region using CMOS technology. This research focuses on millimeter-wave oscillators and quadrature VCO (QVCO) in the 5-GHz band. The thesis can be divided into three parts. The first part introduces the application of oscillators and discusses the theory of LC-VCO. A complementary LC-tank VCO is designed and implemented in this part. The theory and advantages of push-push VCO are introduced, next, and a new low phase noise push-push VCO is implemented. The last part of this thesis discusses the basics and application of QVCO. Three new QVCOs are proposed and implemented. The design concepts together with their advantages are also discussed.
In the thesis, a VCO combining complementary cross-coupled and push-push topology is proposed. The circuit is fabricated by TSMC 0.18-μm CMOS process and it achieved a phase noise of -97 dBc/Hz at 1-MHz offset at 52 GHz with a miniature chip size of 0.2-mm2 area.
Besides high frequency oscillators, QVCOs applied to the 5-GHz band is also covered. Firstly, a switchable QVCO with wide tuning range is designed and fabricated by TSMC 0.18-μm CMOS process. The circuit is realized by using serial coupled techniques to combine two complementary cross-coupled VCOs. From the measurement results, the circuit achieves a phase noise of -120 dBc/Hz at 1-MHz offset at 5.5 GHz with 20% tuning range. Next, a QVCO is implemented by Colpitts oscillator because Colpitts oscillator shows better phase noise than cross-coupled topology. The quadrature phase is realized by using parallel coupling techniques. However, the parallel coupling methods degrade the phase noise performance and increase power consumption. Therefore, the parallel coupled Colpitts QVCO does not show lower phase noise than serial coupled complementary QVCO. Finally, a Colpitts QVCO with a new coupling approach is presented. The circuit has the advantages of low power consumption and low phase noise. From simulations, the QVCO achieves a phase noise of -123 dBc/Hz at 1-MHz offset at 5 GHz with 6-mW dc power consumption.

並列關鍵字

CMOS ； oscillator ； quadrature

參考文獻

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