以預先計算為基礎並結合互斥或參數分離器及七個電晶體記憶細胞元的低功率內容可定址記憶體

A Low Power Precomputation-based Content-Addressable Memory Combining Block XOR Parameter Extractor with 7T CAM Cell

陳豪(Hao Chen)

指導教授 ： 賴飛羆

國立臺灣大學/電機資訊學院/電機工程學研究所/碩士(2008年)

https://doi.org/10.6342/NTU.2008.01484

摘要

內容可定址記憶體常見於需要高速搜尋比對的應用當中，如今最主要的商業應用就是網路路由器了。它平行比對的機制雖具有高速的特性，卻造成了相當高的功率消耗。
過去曾有兩種以預先計算為基礎的內容可定址記憶體，一種是以區塊互斥或來取得參數，而另一種是以數一來取得參數。兩種架構功率消耗的降低方面都有很好的表現。數一的方法雖然有對應於同一參數的資料數量分佈不均勻的問題，但它獨有的7個電晶體的儲存元不但省電還能節省晶片面積。反之，區塊互斥或的架構雖然解決了參數分佈不均勻的問題，卻無法使用7個電晶體的儲存元。
本論文提出了一個新的方法，透過一個額外的編碼器，結合了以上兩者的優點。我們使用 Synopsys 公司的 HSIPCE 搭配 0.18 μm 的製程檔進行模擬。
根據模擬結果，相較於區塊互斥或的方法，本論文提出的方法增加了12.5％的搜尋延遲，但減低了平均功率消耗達23.6％，並且降低了功率-延遲乘積達14％，而在面積的使用上並無增加。

關鍵字

低功率內容可定址記憶體 ； 預先計算 ； 編碼

並列摘要

Content-addressable memory is widely used in the application requiring high search speed. The primary commercial application of CAMs today is Internet routers. Although it has the high speed characteristic due to the parallel comparison, it results in quite high power consumption.
There have been two precomputation-based CAMs proposed previously. One is to extract parameters by means of counting the number of 1’s within input data. Another is to extract parameters by the so called Block XOR method. Both of the two architectures have excellent performance in reducing power consumption. Though the 1’s count method has a problem that the number of data related to a single parameter is not uniform distributed, its unique 7T CAM cells not only reduce power consumption but also save chip area. Whereas the Block XOR method solved the problem of data distribution, it can not apply the 7T CAM cells.
In this thesis, we proposed a novel method. Through an extra input encoder, we combined the advantage of both architectures mentioned above. We further implemented and simulated the whole architecture by Synopsys Hspice using 0.18 μm technology.
Simulation results show that comparing to the Block XOR method, our method has 12.5% longer latency, but the reduction of average power and power-delay product reached 23.6% and 14% respectively. As for the area cost, it remains almost equal.

並列關鍵字

Low power ； Content-Addressable Memory ； Precomputation ； Encode

參考文獻

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