以高介電材質為穿遂層的奈米金粒子金氧半電荷儲存元件

藉由高頻電容電壓(C-V)以及資料儲存(Retention)量測，可以探討電荷在以高介電質材料為穿遂層的奈米金粒子電荷儲存元件中是如何被寫入、抹除以及流失。我們將會用X光繞射儀(XRD)、電流電壓以及電容電壓量測去分析在不同溫度處理下，氧化鉿(HfO2)以及鉿矽酸鹽(HfSiO2)的變化。在高溫下，氧化鉿有結晶化的現象。此現象會降低電容儲存元件的性能。為了避免結晶化的現象，我們使用化學還原沉積的方式製造奈米金粒子。因為此種方式可以在室溫下進行，即可避免氧化鉿在高溫下結晶。由於此材料的高介電特質，在相同的等效氧化層厚度(EOT)下，氧化鉿可以做的比二氧化矽來的厚，如此便能降低從金粒子到矽基板的漏電流。如此一來，以氧化鉿當作穿遂層的元件比起以二氧化矽當作穿遂層的元件，其資料保存能力可以好上兩倍。另外一個避免高溫結晶的方法就是把穿遂層換成鉿矽酸鹽。經過高溫處理的鉿矽酸鹽，我們並沒有觀察到有結晶化的現象。最後，我們控制沉積時間去製造以矽酸鹽為穿遂層且具有不同密度奈米金粒子的元件，進而觀察儲存電荷與奈米金粒子的關係。

關鍵字

氧化鉿

並列摘要

The Au nanocrystal charge storage device by using High-K material as tunneling layer will be investigated in both C-V and Retention measurement to realize how the charge is programmed, erased and leaked. The tunneling layer material, such as HfO2 and HfSiO2, will be examined by XRD, IV, and CV measurement after different temperature annealing. The crystallization phenomenon is observed in HfO2 at high temperature. This phenomenon will decrease the performance of our device. In order to avoid crystallization, we use chemical redundant deposition to fabricate Au nano-dots. Because this process can be done in room temperature, we can keep HfO2 away from high temperature process. Owing to the high permittivity, HfO2 can be thicker than SiO2 in the same equivalent oxide thickness (EOT) and reduce the leakage current from Au nano-dots to silicon substrate. Thus, the retention of device by using HfO2 as tunneling layer is two times better than that by using SiO2 as tunneling layer. Another way to avoid crystallization is to change tunneling layer from HfO2 to HfSiO2. The crystallization phenomenon is not observed in HfSiO2 after high temperature annealing. At last, we are able to fabricate different density of Au dots in devices by using HfSiO2 as tunneling layer by controlling the deposition time. In this way, we can examine the relationship between the stored charge and the density of Au nano-dots.

並列關鍵字

HfO2

參考文獻

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“Nickel nanocrystal formation on HfO2 dielectric for nonvolatile memory device applications” APPLIED PHYSICS LETTERS 86.

[3] Yan Ny Tan, Wai Kin Chim, Wee Kiong Choi, Moon Sig Joo, Tsu Hau Ng and Byung Jin Cho “High-K HfAlO Charge Trapping Layer in SONOS-type Nonvolatile Memory Device for High Speed Operation”

[4] Yan-Ny Tan, Wai-Kin Chim, , Byung Jin Cho, , and Wee-Kiong Choi, “Over-Erase Phenomenon in SONOS-Type Flash Memory and its Minimization Using a Hafnium Oxide Charge Storage Layer” IEEE TRANSACTIONS ON ELECTRON DEVICES, VOL. 51, NO. 7, JULY 2004

[5] S. Tiwari, F. rana, K. Chan, H. Hanafi, W. Chan, and D. Buchanan, “Volatile and Non-volatile Memories in Silicon with Nano-Crystal Storage,” IEDM Tech. Dig., p.521-524, 1995.

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以高介電材質為穿遂層的奈米金粒子金氧半電荷儲存元件

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