本文提出了一個具抗製程、電壓、溫度變異自我穩定技術之環形放大器前端電路應用於連續漸進式類比數位轉換器,與傳統放大器相比,環形放大器中沒有直流工作點,因此不能使用極零點分析,這項因素使得設計上有不穩定的風險,是由於回授迴路所引起的時間延遲,此項和PVT變異有著高度地關聯性。因此,所提出的技術可以偵測輸出電壓用以自動調整內部失調電壓,在以不增加複雜地控制電路和演算法為前提之下,從PVT變異中找出合適地內部失調電壓,以此作為前端電路的類比數位轉換器可以取樣到更為穩定地電壓。 所提出的環形放大器前端電路以及每秒50萬次取樣的10位元類比數位轉換器使用40奈米CMOS製成。量測結果驗證了所提出技術的有效性,這種技術自動地調整內部失調電壓,觀測輸出電壓趨向穩定。另外,輸入頻率達到奈奎斯特頻率量測地有效位元達到8位元以上,並在1.0伏特電源供應下消耗36.06微瓦特,測得地差動非線性和積分非線性分別為+0.74/-0.72和+0.98/-0.99LSB。
This thesis presents a PVT-invariant front-end ring amplifier using self-stabilization technique for SAR ADC. There is no DC operating point in the ring amplifier compared to the conventional operational amplifier. The pole/zero analysis cannot be applied when analyzing the ring amplifier. It poses a potential risk of instability on the design from the feedback loop delay, which is highly PVT-dependent. This technique is an automatic adjustment method of dead-zone voltage by detecting the output voltage. It can find a suitable dead-zone voltage for the ring amplifier in PVT variations without a complex circuit or algorithm. Therefore, the ADC can sample a more stable input voltage from the front-end ring amplifier. The ring amplifier is implemented in a 40-nm CMOS process with a 10-bit 500kS/s SAR ADC. The measured results show the effectiveness of the proposed technique. This technique adjusts the dead-zone voltage automatically, and the output voltage becomes stable. The measured ENOB can be maintained above 8-bit up to the Nyquist-rate input frequency while consuming 36.06uW in 1.0V supply voltage. The measured DNL and INL are +0.74/-0.72 and +0.98/-0.99LSB.