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  • 學位論文

適用於攜帶式裝置之低功耗軟硬體共同設計觸控感測系統

Software Hardware Co-design for Power and Performance Optimization on Touch Sensing Panel System

指導教授 : 吳安宇

摘要


在隨著手機以及平板使用的普及率提高,許多攜帶式裝置的市場需求因此提升。而為了追求更好的使用品質,觸控面板的大小需求也增加,造成更龐大的運算資源消耗,並且也會影響觸控感測系統的穩定性。並且在攜帶裝置上的運算資源有限,因此對於中央處理單元的使用格外重要,若將所有運算都交給中央處理單元,往往會需要高規格的中央處理器,以及相當多的能量消耗。 此論文提出一軟硬體共同設計之觸控感測系統,首先從演算法層級分析如何改善傳統的觸控感測系統的運算速度問題,並且比較不同的演算法對於觸控品質的優劣性來決定後續實做演算法的選擇。並且藉由軟硬體共同設計所具有的硬體加速特性,讓中央處理單元的部分運算能由硬體來完成,以實現降低中央處理器的運算量並且降低整體系統功率消耗。除了在電子系統層級平台技術(ESL)層級完成軟硬體共同設計的分析,我們也實際在現場可程式邏輯閘陣列(FPGA)開發板上驗證這套軟硬體共同設計流程。 此論文觸控感測系統為例,分別在ESL層級和實體開發板上驗證。此論文提出之軟硬體共同設計系統,可在相同的處理速度下,降低能源消耗。

並列摘要


With the increase in the popularity of mobile phones and flatbeds, the market demand for many portable devices has increased. In order to pursue better use of quality, touch panel size requirements also increased. Larger computing resource consumption, and will also affect the touch sensing system stability. The computational resources on the portable device are limited, so the use of the central processing unit is particularly important. If all the operations are handed over to the central processing unit, a high standard central processor and a considerable amount of energy consumption are often required. This paper presents a touch-sensing system designed jointly by software and hardware. Firstly, it analyzes how to improve the speed of traditional touch sensing system from the algorithm level and compares the advantages and disadvantages of different algorithms for touch quality. Determine the choice of follow-up to do the algorithm. By the acceleration of hardware, the central processing unit part of the operation can be done by the hardware to achieve the reduction of the central processing unit and reduce the overall system power consumption. In addition to the ESL level to complete the common design of hardware and software analysis, we also actually in the FPGA development board to verify the software and hardware common design process. This paper presents hardware and software co-design system that can reduce energy consumption at the same processing speed.

參考文獻


[1] C. L. Lin et al., "Insertion of simple structure between gate driver circuits to prevent stress degradation in in-cell touch panel using multi-v blanking method", J. Display Technol.
[2] C. Lin, Y. Chang, C. Hung, C. Tu, C. Chuang, "Position estimation and smooth tracking with a fuzzy logic-based adaptive strong tracking Kalman filter for capacitive touch panels", IEEE Trans. Ind. Electron., vol. 62, no. 8, pp. 5097-5108, Aug. 2015.
[3] H. Akhtar, R. Kakarala, "A comparative analysis of capacitive touch panel grid designs and interpolation methods", Int. Conf. on Image Process., Feb , 2014.
[4] Jun-Hyeok Yang, et al., “A noise-immune high-speed readout circuit for in-cell touch screen panels,” in IEEE Trans. Circuits and Systems-I, vol. 60, no. 7, pp. 1800-1809, Jul. 2013.
[5] Hyungcheol Shin, et al., “A 55db snr with 240hz frame scan rate mutual capacitor 30×24 touch-screen panel read-out ic using code-division multiple sensing technique,” in Proc ISSCC Dig. Tech. Papers, pp. 388-340, Feb. 2013.

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