超低電壓具多重相位觸發及自動變頻機制之數位式低壓降線性穩壓器

Digital Low-Dropout Regulator with Multiple Phase trigger and Automatic Frequency Conversion Mechanism in Ultra-Low Voltage Input

介志中(Chih-Chung Chieh)

指導教授 ： 楊維斌

淡江大學/工學院/電機工程學系碩士班/碩士(2019年)

https://doi.org/10.6846/TKU.2019.00415

摘要

隨著穿戴式電子產品的蓬勃發展，IC產業也越來越專注在超低電壓、超低功耗、高整合度…等等方面設計，而數位式低壓降線性穩壓器不僅能操作在超低電壓，也因為不需使用外接電感元件故有體積小的優勢，所以較常被使用在可攜式產品中。此論文提出具雙調節機制之超低電壓數位式非同步低壓降線性穩壓器，論文使用TSMC 90nm 1P9M製程作設計，電路操作在輸入電壓0.5V，可以提供輸出負載電流600μA至2.4mA之0.3V電壓，而此電壓可以供給許多系統作使用例如:感測器、類比數位轉化器、靜態隨機存取記憶體…等等。
此研究採用數位同步式的設計，其電路複雜度相較於非同步式而言較為簡易，然而隨著通訊與手機產業的崛起，低壓降線性穩壓器除了不斷往快速響應的方向，系統中已逐漸以高轉換效率的理念並提高雜訊抑制能力來設計。在設計同步的時脈時頻率越高追鎖速度相對就會越快，但相對的電流效率會越來越低，因此如何在同一頻率的一個週期內做出更多的比較，就可以達到更快的鎖定速率、更高的電流轉換效率，即為本論文的研究出發點。
在未來的電源管理系統中需要輸出多組不同電壓供電，因此如何克服不同輸出間能夠不互相影響，並且抗製程、溫度、電壓變異…等，將是未來發展方向之一；隨著綠能觀念的意識抬頭，電源管理系統也更重視獵能電路的發展，因此如何設計一高效能的電源管理系統以用來結合獵能趨勢，也必然是電源管理系統最大的挑戰，以上為此論文未來研究發展的方向以及重點。

關鍵字

超低電壓 ； 數位式低壓降線性穩壓器 ； 同步控制迴路 ； 多重相位觸發 ； 自動變頻機制

並列摘要

With the proliferation of wearable electronics products, IC industry will focus on Ultra-Low voltage, Ultra-Low power, high degree of integration. Digital Low-Dropout Regulator can operate in ultra-low voltage. Because not to need extra inductance, it has the advantage of small volume. It usually used in portable products. This paper proposed design of synchronous digital low-dropout regulator with multiple phase trigger and automatic frequency conversion mechanism in Ultra-Low Voltage Input. The chip is fabricated by TSMC 90nm 1P9M process. This system operates in 0.5V input and 0.3V output with the load current of 600μA to 2.4mA. It can provide to lots of system, such as sensor, analog-to-digital convertor, SRAM, and so on. This research designed by digital synchronous control loop. It’s circuit complexity is simpler than asynchronous control loop. When designing the synchronous architecture, high frequency can make tracking speed fast, but the max current efficiency will be lower. Therefore, how to make more comparisons in the same frequency is the most important idea in this project. When system is finished to track the correct output voltage and current, then Peak Detector will give a signal to DCO reduce the output frequency to half, used to reduce the power consumption. In the future power management system, it is necessary to output multiple sets of different voltages, so how to overcome the different outputs resistance to process, temperature, voltage variation, etc., , and the power management system pays more attention to the development of the hunting circuit. Therefore, how to design a high-performance power management system to combine the harvesting is also the biggest challenge of the power management system.

並列關鍵字

Ultra-Low Voltage ； Digital LDO ； Synchronous Control Loop ； Mutiple phase trigger ； Automatic frequency conversion mechanism

參考文獻

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