低壓差穩壓器含帶差參考電路之電路設計

DESIGN OF LOW DROPOUT REGULATOR WITH BANDGAP REFERENCE CIRCUIT

歐維亞(Odugoudar Vidya)

指導教授 ： 盧志文

國立清華大學/原子科學院/工程與系統科學系/碩士(2022年)

摘要

電池的操作在可攜式電子產品的應用上有大量的改善及增強，因此電源管理系統成為一項值得深思的重要問題。電源管理系統是為了提供能量給予可攜式裝置，如智慧型手機、筆記型電腦、無線傳輸網路等，提供其穩定的電源供應。近幾年來有大量的需求於高性能的調節器例如高解析度、高效能轉換、高電源供應抵制都成為主要特性。多級的低壓差調節器(Low dropout regulator, LDO)可以達到此效果。LDO常被使用，因為有低消耗功率、快速響應、簡易、低成本、小的晶片面積和低雜訊的好處。在這樣的條件下，低壓差調節器相較於其他傳統的線性調節器成為了一個受人喜歡的選擇在低電壓操作的晶片電源系統的應用上。LDO是新興於更改善的效率，讓他們是何在系統晶片(system on chip, SOC)上的應用。這樣的LDO需要提供不變且不受雜訊影響且較好的暫態響應，例如負載調節率、電源電壓調節率、穩定分析和PSR。
類比積體電路設計以獲得明確定義的參考電壓和電流值已成為電路中的主要問題，因此可以透過Bandgap參考電路來滿足晶片上的設計。本論文的重點在於性能參數的理論理解以及Bandgap參考電路的設計。Bandgap參考電路發揮著主導作用，因為它提供不受溫度變化、雜訊、功耗和電源電壓波動影響的恆定直流電壓。這種Bandgap參考電路由於其尺寸較小且功耗較低而成為首選。
本篇論文使用0.18um CMOS製程實現LDO用於驅動晶片中的低電壓。主要目標是基於Bandgap電路含兩級折疊式疊接放大器及啟動電路用於啟動電源訊號。當輸入電壓3.3 V時可提供高精確的2.69 V輸出電壓，負載電流小於100mA且只有20uA的靜態電流和好的PSR。負載調節率、電源電壓調節率、穩定分析和PSR都很好在(-40, 25, 50, 125)的溫度區間。此處使用0.7V截止電壓製程及3.3V輸入供應電壓。電路設計目標為含Bandgap電路的LDO，設計和模擬使用EDA軟體HSPICE，布局則使用Laker工具。
關鍵字: 低壓差調節器(LDO)、高頻寬、參考電壓追蹤、回授電容、追蹤錯誤

關鍵字

低压差稳压器 ； 高带宽 ； 带隙参考 ； 参考跟踪 ； 反馈电容 ； 跟踪误差

並列摘要

The massive improvement and enhancement of battery-operated portable electronic applications, the power management has become more important issue to be considered. Power management is nothing but conditioning and supplying the energy for portable devices such as smart phones, laptops, wireless sensor networks which operate on stable power. In the recent years, there is a huge demand for high performance regulator such as high resolution, efficiency and high power supply rejection is growing as a major feature. The multi-stage low dropout regulator (LDO) can achieve this target. The LDO are widely used because of their small power consumption, fast response, simplicity, low cost of implementation, small chip area or low board space, and low noise. Nowadays, low dropout regulators have more demand and importance is given due to their the less power consumption as compared with any other regulators. The LDO regulators are emerging with more improved efficiency, which makes them suitable for system on chip (SoC) applications. These LDO must supply a constant, noise-independent, better transient response, like load regulation, line regulation, stability analysis and PSR depending on the particular application.
An analog integrated circuit designing to obtain well defined values of reference voltages and currents has become a main issue in the circuits. This can be accomplished on-chip by using band gap reference circuits. The importance in this thesis lies on theoretical understanding of the performance parameters as well as the design of band gap reference circuit. This reference circuit is playing a major role as it has the capability to contribute a stable DC voltage which is immune to temperature variations, output noise, and power supply voltage fluctuations. This band gap reference circuit is preferred due to its smaller size and consume less power.
This paper work presents a 0.18um CMOS Low Dropout Voltage Regulator (LDO) to attain developments in design of low power portable systems . The proposed structure of LDO is mainly based on band gap reference circuit (BGR) with two stage folded cascade opamp and start-up circuit arrangement using POR (power on reset) signal. This provides a high precision of 2.69 V output voltage for the input supply voltage of 3.3V for load current of <100mA with only 20uA quiescent current and good PSR. Line, load regulation, transient and stability analysis are better over a (-40, 25, 50, 125) temperature span. Here we have used 0.7V threshold process with 3.3V input supply voltage. The circuit design of the proposed low dropout regulator with band gap reference scheme are designed and analyzed with the electronic design automation tool HSPICE, and Laker tool is used to generate the layout structure.

並列關鍵字

low dropout regulator ； High Bandwidth ； Band Gap Reference ； Reference Tracking ； feedback capacitor ； tracking error

參考文獻

Reference

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