2.4GHz/5GHz單雙頻增益可調低雜訊放大器之設計

Design of the 2.4GHz/5GHz Single And Dual Band CMOS Gain-Variable Low Noise Amplifier

黃瑞明(Jui-Ming Haung)

指導教授 ： 宋國明 ； 譚旦旭

國立臺北科技大學/機電學院/自動化科技研究所/碩士(2005年)

https://doi.org/10.6841/NTUT.2005.00007

摘要

本論文主要是設計符合IEEE802.11a部份系統規格之接收機，首先針對5.25 GHz增益可調低雜訊放大器做設計，再藉由實際量測經驗，進行雙頻5.25 GHz/2.4 GHz差動式增益可調低雜訊放大器的設計工作，並將佈局(layout)設計與打線問題時所遇到的困難加以解決，以提升系統效能。
　　單頻5.25GHz增益可調低雜訊放大器的模擬結果顯示，若操作電位為1.8伏特時，其消耗功率為13.158 mW、輸入返回損耗為35.697 dB、輸出返回損耗為37.933 dB、隔離度為50.142 dB、增益為0.884 dB到16.89 dB、雜訊指數為2.946 dB、P1dB為-7.325 dBm與IP3為0.517 dBm。
　　反觀雙頻2.4 GHz/5.25 GHz差動增益可調低雜訊放大器的模擬結果指出，若操作在頻率為2.4 GHz且電位為1.8伏特時，其消耗功率為16.776 mW、輸入返回損耗為25.561 dB、輸出返回損耗為21.519 dB、隔離度為62.506 dB、增益為16.655 dB到19.982 dB、雜訊指數為2.856 dB、P1dB為-16.92 dBm及IIP3為9.422 dBm；若操作頻率為5.25 GHz且電位為1.8伏特時，其消耗功率為16.776 mW、輸入返回損耗為22.765 dB、輸出返回損耗為33.288 dB、隔離度為44.785 dB、增益為2.634 dB到16.327 dB、雜訊指數為3.094 dB、P1dB為-18.76 dBm及IIP3為5.141 dBm。

關鍵字

低雜訊放大器 ； 射頻積體電路 ； 增益可調 ； 無線通訊

並列摘要

In this paper, we try to design a simple receiver based on IEEE802.11a specification. First of all, we design a 5.25 GHz CMOS gain-variable LNA and measure this chip to obtain the design experience of the RF circuit. Then we design a 2.4GHz/5.25GHz dual band differential gain-variable low noise amplifier. The key technique is to overcome the noise effect induced by mismatched layout and bound wire.
　The simulation results of the 5.25 GHz CMOS low noise amplifier (LNA) show that the power consumption, S11, S22, S21, NF, P1dB, and IIP3 are 13.158 mW,35.697 dB, 37.933 dB, 50.142 dB, 2.946 dB, -7.325 dBm, and 0.517 dBm, respectively. Note that the gain varies from 0.884 dB to 16.89 dB.
　For the 2.4 GHz/5.25 GHz dual band differential gain variable low noise amplifier, if it operates at 2.4 GHz, the simulation results show that the power consumption, S11, S22, S12, NF, P1dB, and IIP3 are 16.776 mW, 25.561 dB, 21.519 dB, 62.506 dB, 2.856 dB, -16.92 dBm, and 9.422 dBm, respectively, and the gain varies from 16.665dB to 19.892dB. Also, if it operates at 5.25GHz, the simulation results show that the power consumption, S11, S22, S12, NF, P1dB and IIP3 are 16.776mW, 22.765dB, 33.288dB, 44.785dB, 3.094dB, -18.76dBm, and 5.141dBm, respectively, and the gain varies from 2.634dB to 16.327dB.

並列關鍵字

Low noise amplifier ； Radio frequency integrated circuit ； Gain-variable ； Wireless Communication.

參考文獻

[3] M. J. Riezenman ,”Technology 1998: analysis and forecast–communications,” IEEE Spectrum, pp.29-36, January 1998.

[5] T. H. Lee, The design of CMOS Radio-Frequency Integrated Circuit, 2nd ed., Cambridge University Press, 1998

[8] D. K. Shaeffer and T. H. Lee, “A 1.5-V, 1.5GHz CMOS Low Noise Amplifier,” IEEE JSSC, vol. 32, no. 5, pp.745-759, May 1997.

[12] 朱元凱，應用於802.11a WLAN之5GHz U-NII頻帶降頻器CMOS RF IC，碩士論文，國立成功大學電機工程學系所，台南，2002。

[13] D. M. Pozar, Microwave Engineering, University of Massachusetts at Amherst John Wiley & Sons, 1998.