介面合成之啟發式記憶體映射演算法

A Heuristic Memory Mapping Algorithm for Interface Synthesis

鄧人輔(Ren-Fu Deng)

指導教授 ： 李宗演

國立臺北科技大學/機電學院/電腦與通訊研究所/碩士(2006年)

摘要

在軟硬體共同設計的系統中，為了讓已分割的軟硬體同時存取變數或資料，因此系統軟硬體需要做資料或變數傳輸。而這樣的傳輸方式必須透過介面合成的技術來完成，其中一項重要的介面合成技術方法稱為記憶體映射(Memory Mapping)。在考量多埠記憶體成本以及每個時脈週期存取變數之資訊下，我們利用時脈週期存取變數個數之多寡配合記憶體埠組合的方式，提出一個啟發式(Heuristic)記憶體映射演算法。經由實驗結果可以證實我們提出的方法能夠有效率的降低系統硬體成本，與相關研究比較下，可以發現本研究在變動時脈週期以及變數個數情況下可以減少7.6%的硬體成本以及減低9.2%的記憶體埠使用數量，同時也減少了8%記憶體使用個數。在變動時脈週期內存取最多變數個數情況下可以減少7.8%的硬體成本以及減低7.9%的記憶體埠使用數量，同時也減少了8.9%記憶體使用個數。

關鍵字

軟硬體共同設計 ； 介面合成 ； 記憶體映射 ； 多埠記憶體

並列摘要

The communication of variable or data between partitioned hardware and software parts will be produced in hardware-software codesign. The interface synthesis methodology will conquer the variables communication problem. The one of solution for interface synthesis is using memory mapping method. In this thesis, we propose a heuristic algorithm of memory mapping to solve variable mapping issue that includes appropriate memory port and number. Experimental results shown that our proposed algorithm under the condition of varying clock cycles and the number of variables can reduce 7.6% hardware cost, 9.2% used the ports of multi-port memory numbers and 8% used the number of multi-port-memory instances. Under the condition of varying the number of the most accessed variables during a clock cycle, our proposed algorithm can reduce 7.8% hardware cost, 7.9% used the ports of multi-port-memory numbers and 8.9% used the number of multi-port-memory instances.

並列關鍵字

Hardware-Software Codesign ； Interface synthesis ； Memory Mapping ； Multi-Port Memory

參考文獻

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