泛用型環狀高效類神經硬體設計

Implementation of High Performance Hardware Based Toroidal Neural Network

蔡俊成(Jun-Cheng Tsai)

指導教授 ： 蔡孟伸

國立臺北科技大學/機電學院/自動化科技研究所/碩士(2007年)

摘要

現今許多的人工智慧應用領域中，類神經網路扮演著重要的角色。大部分的應用，類神經網路是以軟體的方式在一般的計算機上面實現。雖然兼具了彈性，但運算速度十分耗時。學習的過程僅能以離線(Off-Line)的方式運算，阻礙了應用的範圍。類神經網路在運算時需要進行大量的數學運算，這些透過軟體實現的系統只能於高速的計算機上順利執行，而無法在低階的嵌入式系統中進行應用。隨著科技的發展，人們嘗試以硬體來實現類神經網路藉以提高速度。有些硬體僅針對特定用途類神經網路架構及參數進行設計，開發時間長且限制了移植性；另一些硬體則使用大量的邏輯元件、佔據龐大晶片面積，耗費成本。本文的目的是開發出一個高效能的泛用型類神經網路系統，藉由採用環狀串列多資料匯流排架構，進行倒傳遞類神經網路的運算，使其具有回想(Recall)與學習(Learning)的完整功能。使用者可以根據倒傳遞架構的不同，調整陣列中運算單元的數量，而不需要再重新規劃及設計整個系統。期望透過這樣的開發，將類神經網路的應用延伸到低階的嵌入式系統中，以帶動新一代的應用。本文改善以往類神經網路硬體架構，透過較少的邏輯元件數目，在兼具彈性的同時，還能達到更佳的執行效能效果。

關鍵字

倒傳遞類神經 ； 可程式化邏輯閘陣列 ； 環狀串列

並列摘要

Neural networks play an important role in artificial intelligence application domains. In most of applications, neural networks are often implemented in software form. Although the software implementation of neural networks provides flexibility, the operating speed is limited due to the sequential machine architecture. In most applications, the learning procedure is carried off-line. A large amount of mathematics operations are needed when learning task of neural networks is performed. The neural network systems implemented using software can only work well in high speed computers. The performance is not adequate when it is implemented on embedded systems. Following the development of modern technologies, people attempt to realize the neural networks by hardware in order to improve the performance. Designs utilizing special architectures and parameters to achieve the performance were proposed in the past in order to provide higher performance. This thesis proposes a high efficiency and generic neural network hardware architecture. The architecture uses the toroidal series multiple data stream to process the back propagation neural network operations, which has the full function of recall and learning capabilities. Users can adjust the number of processor unit in the system based on the requirement of the applications. Since the proposed system is developed in hardware, it can be integrated into embedded systems. The experimental results show that the system can reach higher performance by using fewer logical elements while maintaining flexibility.

並列關鍵字

Back-Propagation Neural Network ； FPGA ； Toroidal Serial

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