使用於橢圓曲線密碼系統之低成本純量乘法器晶片設計與實現

Design and Implementation of the Low Cost Scalar Multiplier-on-Chip for Elliptic Curve Cryptosystem

吳錫晏(Xi-Yan Wu)

指導教授 ： 宋國明

國立臺北科技大學/電資學院/電機工程系所/碩士(2011年)

摘要

金鑰長度為160位元的橢圓曲線密碼系統即可提供與金鑰長度為1024位元的RSA密碼系統相同的安全水平，這意味著橢圓曲線密碼系統擁有金鑰長度較短的特性。鑑於此特性，橢圓曲線密碼系統所需要的儲存元件可以大幅降低，晶片電路面積同時下降，故相當適合運用在可攜式設備上。
在橢圓曲線密碼系統中，純量乘法扮演著系統核心運算的角色。本論文即是透過公式推導以及電路設計，綜合管線式架構與平行處理架構，進而提出一種雙運算核心架構的橢圓曲線純量乘法器，並且利用Xilinx XC5VLX110T FPGA來驗證電路功能的正確性與其可操作之最高操作頻率; FPGA實做結果顯示，得到本系統最高操作頻率為173MHz，LUT的切片數目為14999 ，執行一次純量乘法的時間僅需8.8μs。與相關的文獻比較，本論文所提出之架構可提供高速運算並且有效將面積降低28%。最後，以超大型積體電路技術完成一顆具有橢圓曲線純量乘法器的專用晶片。

關鍵字

橢圓曲線密碼系統 ； 蒙格瑪利純量乘法 ； 有限場 ； 密碼學

並列摘要

Various studies had pointed out that a 160-bit elliptic curve cryptosystem provides the same level of safety as 1024-bit RSA cryptography. It means that the elliptic curve cryptography works with a short key length. Owing to this merit, the elliptic curve cryptography is suitable for mobile device with its small chip area.
Scalar multiplication plays the key role of core calculations in the elliptic curve cryptosystem. In this thesis the proposed architecture uses the parallel processing method to accelerate its operating speed. In short, this thesis continued combines the pipeline architecture with parallel architecture to complete a dual operating core architectures elliptic curve scalar multiplier. A Xilinx XC5VLX110T FPGA board is used to verify the performance in circuit functions and to have the highest operational frequency. According to the experimental result with FPGA, the highest operational frequency is roughly 173MHz the LUT number is 14999 slices and the executed time for our scalar multiplication is only 8.8μs. Compared with the literature in recent years, this thesis not only provides a high-speed computation, but also effectively reduce about 28% in hardware area. Finally, an elliptic curve scalar multiplier ASIC is implemented with TSMC 0.18μm process.

並列關鍵字

Elliptic curve cryptosystem ； Montgomery scalar multiplication ； Finite fields ； Cryptography

參考文獻

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