本論文主要研究在高整合、高複雜度的電路設計中,因電流快速切換而產生的接地彈跳雜訊。此雜訊會在電源/接地平面傳播且會耦合至上下層鄰近的電源/接地平面,使電路的功率完整性受到影響。在本論文對此雜訊耦合問題所造成的電磁輻射效應影響,利用前人所提出的雙重疊加阻抗法來探討此雜訊的問題,且利用分離矩陣法來探討不規則形狀印刷電路板上的雜訊問題,並簡化此參數法為單一疊加阻抗法,以此單一疊加阻抗法來計算此輻射效應影響更能節省其計算時間。 而本論文中抑制雜訊耦合問題所造成的電磁輻射效應是利用去耦合電容使得電路的共振頻率不要低於操作頻率,這樣就可減低雜訊或是保護電路元件的正常工作,且應用粒子群聚最佳化法來找出在印刷電路板上最佳放置電容的位置,以期望能夠減少擺放電容的數量而能達到最佳之效果,更重要的是利用單雙重疊加阻抗法加上粒子群舉最佳化法來計算出不規則形狀的電路板上最佳的電容的擺放位置,來抑制一些特定的頻率點,藉由模擬和實驗結果,證明本論文所提出的單雙重疊加阻抗法結合粒子群聚最佳化法可以迅速並正確地找出最佳電容的位置,來有效地抑制印刷電路板上的阻抗。
This thesis discusses the Ground Bounce Noise in today’s high-integrative and high-complexity circuit designs. Ground Bounce Noise not only transmits in its own power/ground plane, but also couples to neighboring power/ground plane. Moreover, the thesis presented electromagnetic radiation effect by noise coupling problem which uses the double summation Z method to discuss this noise problem. In an arbitrary shape PCB, this thesis uses the segregation Matrix method to discuss the noise problem. However, it may compute those effects for a long time. Therefore, this thesis derives a fast algorithm that modifies double summation to single summation. It is common practice to suppress resonant mode by decoupling capacitors. The decoupling capacitors make the resonance frequency higher than the operation frequency and it can suppress the noise to make the circuit component work successfully. Furthermore, Particle swarm optimization is performed to find the optimal positions of decoupling capacitors. This particle swarm optimization also reduces the capacitor numbers to achieve the optimum result. The main achievement of this thesis is to develop a powerful model expansion method for solving arbitrary shape PCB, and determine the locations of decoupling capacitors. Any unwanted resonant frequency can be suppressed by decoupling capacitors specified by this method. Simulation and Measurement results prove that the present method is very useful and practical in the issue of power integrity (PI).