射頻橫向擴散金氧半場效電晶體之最佳佈局設計與分析

Optimized Layout Designs and Characterization of RF LDMOS Transistors

陳奕嘉(Yi-Jia Chen 陳奕嘉)

指導教授 ： 胡心卉

國立臺北科技大學/電資學院/電腦與通訊研究所/碩士(2014年)

https://doi.org/10.6841/NTUT.2014.00109

摘要

本論文主要討論射頻橫向擴散金氧半場效電晶體(RF LDMOS)元件在不同元件佈局(layout)下的特性。利用CMOS製程平台製作LDMOS元件，在元件佈局上則設計汲極擴展與各種電場板(field plate)接法的電晶體，在直流分析上，主要參數包含轉導、導通電阻和崩潰電壓，找出最佳的drift區濃度，利用這個製程條件進一步的比較高頻特性。主要的高頻參數包括截止頻率與最大震盪頻率，隨著元件結構的不同，萃取小訊號模型，使我們更清楚了解結構改變後的參數變化。在功率特性方面，透過使用load pull量測two tone方式獲得功率參數，如功率增益、1dB增益壓縮點之輸出功率和附加功率效率，讓我們可以更了解改變參數後的優勢。
我們以三種不同濃度的drift區來比較源極擴展結構與一般結構的LDMOS的輸出特性，透過量測與萃取小訊號參數，我們觀察到以低濃度的wide-drain LDMOS改善最多。
接下來我們比較LDMOS在不同電場板結構下的直流與高頻特性，在DC特性上，崩潰電壓與導通電阻在加入電場板以後都有明顯的改善。在高頻特性方面，由於連接閘極的電場板在Vg=2.4 V以後，轉導會上升，而連接源極的場板沒有這個現象；另外，由於加入的電場板位於漂移區上方，會產生額外的寄生電容，因此元件的高頻特性會變差，藉由最佳化電場板設計，可使具有場板的元件的高頻特性接近於沒有場板的元件。

關鍵字

LDMOS ； 汲極擴展 ； field plate ； 截止頻率 ； 最大震盪頻率

並列摘要

In this thesis, we investigate RF LDMOS performances with various layout structures. LDMOS transistors with wide-drain layouts and different field plate structures were fabricated using standard CMOS process. By measuring and analyzing DC, S-parameter and power characteristics of transistors, we found optimized design guidelines for RF LDMOS. The transconductance, on-resistance and breakdown voltage were obtained from DC characteristics, while the cut-off frequency and maximum oscillation frequency were extracted from S-parameters. The power and linearity parameters were measured using the load pull system at two tone mode.
For wide-drain LDMOS, we compared their performances with conventional LDMOS under different doping concentrations in the drift region. From the measurement results and extracted small-signal model parameters, we know the wide-drain LDMOS has more improvement at low drift doping concentration..
In this thesis, we also compare the LDMOS with different field plate structures. Both the breakdown voltage and on resistance are improved when the field plate is connected to source or gate. Moreover, we observe the devices with gate-connected field plate have higher transconductance than those without field plate after Vg=2.4V, while the transconductance of devices with source-connected field plate is similar to those without field plate.Owing to the overlap of the metal field plate and drift region, the LDMOS transistors with field plate exhibit larger parasitic capacitances. Therefore, their RF performance are not as good as the devices without field plate. By optimizing the field palte design, the RF performance degradation can be minimized.

並列關鍵字

LDMOS ； wide drain ； field plate ； cutoff frequency ； maximum oscillation frequency

參考文獻

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