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  • 學位論文

應用於K頻帶之CMOS射頻前端電路的設計與實現

Design and Implementation of CMOSFront-end RFICs for K-Band

指導教授 : 王紳

摘要


本篇論文採用TSMC 0.18-?m CMOS製程去設計應用於K頻帶之射頻前端電路,其中包含的電路分別為一個基於緊密耦合線於互補金氧半導體的同相功率分配器與一個具有虛像拒斥、電流再利用技術的倍頻器以及一個低功耗的壓控振盪器。同相功率分配器是經由結合邊緣耦合蜿蜒合成了quasi-TEM傳輸線,而所提出的合成傳輸線是由所謂complementary-conducting-strip coupled-line(CCS CL)的週期結構所組合而成,比起傳統耦合線具有更多的設計參數,經由利用此耦合線模型,在同相混合時,顯示了一個3.0 dB功率分波器在兩個輸出埠和輸入埠具有零度的相位差。此外,邊緣耦合傳輸線採用蜿蜒的形式來實現電路的微型化。一個採用虛像拒斥、電流再利用技術所設計的倍頻器,具有高fundamental rejection的特性。藉由連接一個拒斥濾波器,以降低一次諧波訊號來提升二次諧波訊號,此外,濾波器的電感是由高品質因子的半主動式電感所取代,它是以非對稱性抽頭式電感結合電晶體所設計而成,此電路不僅改善濾波器的性能,同時也提升fundamental rejection的特性。一個低功耗壓控振盪器的設計採用了PMOS差動對作為電路架構。藉由並聯變容器、電容器組來取代傳統LC 諧振埠,以提升相位雜訊的特性。此外,經由採用所提出的中心抽頭螺旋電感,以實現晶片微型化。

並列摘要


In this thesis, design of RF front-end circuit at K-band is adopted in TSMC 0.18-?m CMOS process. The presented circuits include a compact coupled-line-based in-phase power divider, a frequency doubler with a notch filter and current reused topology, and a low power voltage controlled oscillator (VCO). The in-phase power divider by incorporating the edge-coupled meandered synthetic quasi-TEM transmission line (TL) is presented. The proposed synthetic TL, so-called the complementary-conducting-strip coupled-line (CCS CL) consists of the unit cell, which has more design parameters than that of the conventional coupled-line (CL). By using the proposed coupled-line model, the in-phase hybrid reveals a 3.0 dB power divider with a 00 phase difference in the two output ports and input port. Moreover, the presented edge-coupled TL using the meandered-form, achieve miniaturization of the circuit. Design of an adopted notch filter and current reused technique frequency doubler has characteristic of good fundamental rejection. Through reducing the first harmonic signal to enhance the second harmonic signal by connecting a notch filter. In addition, the filter inductor is replaced by a semi-active inductor of high quality factor, which is made of non-symmetry-tapped inductor combination transistor design. It’s mainly to improve the filter performance and further increase fundamental rejection characteristics. It’s not only to improve filter performance, but also enhance fundamental rejection characteristics. Design of an X-band VCO is adopted PMOS cross-coupled pair as circuit architecture. The superior phase noise performance is further improved by adopting parallel varactor and capacitor banks to replace the conventional LC tank. Moreover, the chip miniaturization is implemented by using the proposed center-tapped spiral inductor. Finally, the VCO and frequency doubler integration are evaluated by simulation results.

參考文獻


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