CPU使用率與記憶體存取率導向之動態電壓頻率調整演算法

在需仰賴電池為主要供電來源的手持裝置中，節省能源是一個相當重要的課題，其中DVFS是一種低功耗的機制，可以在系統正在運行的情況下節省能源。在過去的研究中，我們提出MAR-CSE等式用來描述處理器的頻率與記憶體存取率之間的關係，使其將能源消耗保持在最小狀況。然而MAR-CSE等式並不能應付所有的情況，甚至導致多餘的能源消耗。舉例來說，在一固定的時間區間內記憶體存取率與總被執行的指令數皆為低的情況下，MAR-CSE等式會誤判並且將處理器的頻率提高。然而此時提高頻率並不會大幅提升程式的效能，反而提升能源消耗。這論文中，我們提出一個基於MAR-CSE等式並且利用CPU使用率來輔助判斷頻率的DVFS演算法，我們利用MiBench這套測量程式以及一些在Linux中常用的指令求出切換頻率或決策頻率的機制來調整處理器的頻率。在實作測試中，我們利用Linux中CPUfreq governor的架構來實作我們的演算法，並且利用EDP作為評估的指標。

關鍵字

低功耗；動態電壓頻率調整；記憶體存取率；中央處理器使用率

並列摘要

Saving energy is an important target for portable devices which are powered by batteries. Among low power mechanisms, DVFS is an efficient method which can reduce energy consumption while tasks are running. In our previous studies, we found a relationship between the memory access rate and the frequency which minimizes the energy consumption. We have proposed an equation named MAR-CSE which represents this relationship and is used to perform dynamic frequency selection. However, the MAR-CSE equation cannot handle all the cases. It may cause the energy consumption to be increased inversely. For example, if both of the memory access rate and the number of instruction executed are low, the system will scale up the frequency according to the MAR-CSE equation. This may not be correct, because the system could be in an I/O state. A low frequency will be more suitable for this case. In this thesis, we improve our MAR-CSE-based DVFS algorithm. The CPU utilization is considered in the algorithm. We use the MiBench benchmarks and some utility programs in Linux to find the thresholds which can distinguish among I/O bound, memory bound, and CPU bound according to the memory access rate and the CPU utilization information. We have implemented the algorithm in the Linux kernel based on the CPUfreq subsystem, a processor power management architecture for Linux. The EDP metric is used to prove our algorithm is good at energy saving and low performance loss.

並列關鍵字

Low Power ； Energy saving ； DVFS ； MAR-CSE ； CPU utilization

參考文獻

[4] Mark Horowitz, Thomas Indermaur, and Ricardo Gonzalez, “Low-Power Digital Design”, IEEE Symposium on Low Power Electronics, 1994

[6] Xia Zhao, Yao Guo, Xiangqun Chen, “Transaction-Based Adaptive Dynamic Voltage Scaling for Interactive Applications”, ISLPED '09 Proceedings of the 14th ACM/IEEE international symposium on Low power electronics and design, 2009

[8] Canturk Isci, Gilberto Contreras and Margaret Martonosi ,“Live, Runtime Phase Monitoring and Prediction on Real Systems”, MICRO 39 Proceedings of the 39th Annual IEEE/ACM International Symposium on Microarchitecture, 2006.

[9] Wen-Yew Liang and Po-Ting Lai, "Design and Implementation of a Critical Speed-based DVFS Mechanism for the Android Operating System," in Proc. of the 5th International Conference on Embedded and Multimedia Computing (EMC-10), Cebu, Philippines, Aug 2010, pp. 11-13.

[10] Mohamed Shalan and Dina El-Sissy, “Online Power Management using DVFS for RTOS”, the 4th International Design and Test Workshop (IDT), 2009.

國際替代計量

CPU使用率與記憶體存取率導向之動態電壓頻率調整演算法

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