應用FPGA於具無ADC取樣技術之全數位化功率因數修正器

Applying FPGA to Fully-Digitalized PFC Rectifier without ADC Sampling Technique

張源洲(Yuan-Chou Chang)

指導教授 ： 胡國英

國立臺北科技大學/電資學院/電機工程系研究所/碩士(2012年)

摘要

眾所皆知，欲實現全數位化功率因數修正器需要使用到多顆類比數位轉換器
(Analog-to-Digital Converter, ADC)，然而一顆高性能的ADC 索價不斐，因此本
論文係研製一具無ADC 取樣技術之全數位化功率因數修正器，係利用注入三角
波於功率因數修正器之感測的輸出電壓並與電壓參考值兩者相互比較來進行取
樣，同時利用鋸齒波與感測的輸入電流兩者相互比較來進行電流取樣，並搭配
FPGA 之計數器以獲得輸出電壓資訊及輸入電感電流資訊，因此不須用到
ADC。另一方面，控制器所須之正弦參考命令乃利用零點偵測電路觸發事先撰
寫於FPGA 之正弦表(Sinusoidal Table)，藉由讀取正弦表內之值來做為電流參考
值，並同時搭配傳統平均電流控制法則以產生適當之控制力來驅動功率開關切
換，不僅可使得輸出電壓得以穩定地被調控在所設定的值，同時亦可使得輸入
電流儘可能地為弦波形式且追隨輸入電壓的相位。最後，本論文將藉由結合模
擬軟體Active-HDL 與Matlab/Simulink 來模擬所提之無ADC 取樣技術之全數位
化功率因數修正器，以初步驗證其可行性，並以FPGA 為控制核心來進行相關
實驗，以驗證此架構之有效性。

關鍵字

全數位化 ； FPGA ； 無ADC 取樣技術 ； 計數器 ； 平均電流控制 ； PFC

並列摘要

As generally recognized, in order to realize the fully-digitalized PFC rectifier,
several analog-to-digital converters (ADCs) are indispensable. However, one
high-performance ADC is costly. Consequently, a fully-digitalized PFC rectifier without
ADC sampling is presented. As for the digital output voltage information, it is obtained
by injecting the triangular wave into the sensed output voltage, comparing this resultant
signal with the output voltage reference, and counting the low level of the resulting
signal based on the counter in the FPGA. As for the digital inductor current information,
it is obtained by comparing the sawtooth wave with the sensed inductor current after
filtering, and counting the low level of the resulting signal based on the counter in the
FPGA. On the other hand, the sinusoidal reference command for the current controller
is obtained by triggering the sinusoidal table in the FPGA, via the zero crossing detecting circuit. And, this sinusoidal reference command, together with the traditional
average current control method, generates a suitable control effort to drive the power
switch such that the output voltage is controlled at a desired value and at the same time
the input current follows the input voltage as tightly as possible. In this thesis, some
simulated results, based on Matlab/Simulink combined with Active-HDL, are provided
to demonstrate the feasibility of the proposed fully-digitalized PFC rectifier. Finally,
some experimental results, based on the FPGA used as a control kernel, are offered to
verified its effectiveness.

並列關鍵字

Fully-Digitalized ； FPGA ； Without ADC Sampling Technique ； Counter ； Average Current Control ； PFC

參考文獻

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[4] Ranjan K. Gupta, Hariharan Krishnaswami and Ned Mohan, “A unified analysis of CCM boost PFC for various current control strategies,” IEEE PEDES’06, pp. 1-5, 2006.

[5] Kazunori Nishimura, Nobuhiro Yokoyama, Katsuya Hirachi, Soon-Kurl Kwon and Mutsuo Nakaoka, “Dual high-frequency chopper-based single stage PFC converter with output DC high quality,” IEEE IECON’09, pp. 413-419, 2009.

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