應用無ADC之FPGA控制於DC-DC轉換器

Applying FPGA Control Without ADC to DC-DC Converter

洪國哲(Kuo-Che Hung)

指導教授 ： 胡國英

國立臺北科技大學/電資學院/電機工程系研究所/碩士(2008年)

摘要

本論文主要目的係藉由連結軟體Active-HDL與軟體MATLAB/Simulink，搭配所撰寫之無類比數位轉換器(Analog-to-Digital Converter, ADC)取樣之硬體描述語言(VHSIC Hardware Description Language, VHDL)程式，以模擬全數位化之順向式轉換器(Forward Converter)之運作行為。除此之外，並加入所提之三角波注入法，以提高控制之精準度，使其輸出電壓儘可能地穩定於所設定之規格內。最後，將所撰寫之VHDL導入可編程邏輯閘陣列(Field Programmable Gate Array, FPGA)晶片中，以實現全數位化控制順向式轉換器。於本論文中，具有同步整流(Synchronous Rectification, SR)之順向式轉換器之規格為輸入電壓12V，輸出電壓5V，滿載輸出電流10A，藉由理論推導、模擬及實作以驗證所提架構及方法之可行性。

關鍵字

Active-HDL ； 無ADC取樣 ； 順向式轉換器 ； FPGA

並列摘要

This paper aims at simulating the operating behavior of a fully-digitalized synchronously-rectified (SR) forward converter, via co-simulating the Active-HDL software with the MATLAB/Simulink software. Most of all, the information on the output voltage is sampled without any analog-to-digital converter (ADC), based on the one-comparator counter-based sampling strategy which is implemented mainly by the field programmable gate array (FPGA) and the VHSIC hardware description language (VHDL). Besides, the triangular wave injection is presented herein to improve the sampling accuracy, so as to make the output voltage as close as possible to the prescribed setting. In this thesis, first of all, the associated theoretical derivation is introduced, and secondly some simulated and experimental results are provided.

並列關鍵字

Active-HDL ； Sampling Without ADC ； Forward Converter ； FPGA

參考文獻

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