透過您的圖書館登入
IP:18.224.199.201
  • 學位論文

具三閘極奈米線結構高壓複晶矽薄膜電晶體之特性研究

Characterization of High-Voltage Polycrystalline Silicon Thin Film Transistor with Tri-Gate Nanowire Structure

指導教授 : 胡心卉

摘要


為提昇顯示器品質,系統整合型面板(system on panel, SOP) 技術是未來主要的趨勢。將周邊電路整合於玻璃基板上,進而達到提高性能、降低成本以及減少功率消耗等優勢。顯示器面板與車用電子的驅動IC需要大電壓與大電流的驅動能力,因此高壓元件橫向雙擴散金氧半場效應電晶體LDMOS(Laterally Diffused Metal Oxide Semiconductor)為研究重點,此元件導通電流受漂移區摻雜濃度的影響,金屬場板結構使摻雜濃度影響較小,改善其特徵導通電阻(Specific on Resistance)因而提升元件功率效率、導電能力與導通電流,且在金屬場板上加電壓會使電場峰值偏移進而提高崩潰電壓,此論文使用Sentaurus TCAD 3D 模擬金屬場板LDMOS,採用三維閘極結構,能使閘極有較好電流控制能力且針對不同場板長度加偏壓與不加偏壓對崩潰電壓與特徵導通電阻的影響。場板底下的氧化層厚度(PMD)對崩潰電壓與特徵導通電阻的影響也為探討重點之一,當場板加正偏壓時,此厚度會影響電子聚積於漂移區表面的數量,因而影響特徵導通電阻。

並列摘要


In order to improve the quality of the display , system on pane(SOP) is the trend in future that integrated peripheral circuits on a glass substrate and thus achieve high performance、reduce costs、and reduce power consumption and other advantages. Drive IC application in display panel and automotive electronic requires large voltage and high current driving capability, therefore, focus on high-voltage device lateral double-diffused metal oxide semiconductor field effect transistor LDMOS (Laterally Diffused Metal Oxide Semiconductor). The conduction current affected by the drift region doping concentration, metal field plate structure made the doping concentration not a main factor, improve on-resistance (Specific on Resistance) and thus enhance the power efficiency components, electrical conductivity and conduction current and apply voltage on metal field plate could distribution electric field peak to improve the breakdown voltage, this paper using Sentaurus TCAD 3D simulation of metal field plate LDMOS, adopt three-dimensional gate structure can have a better ability to control, and apply the bias and without bias on metal field plate between different field plate length effect on breakdown voltage and specific on resistance . Oxide thickness underneath field plate will affect electron accumulate on Dirft region surface to affect specific on resistance, oxide thickness underneath field plate is our issue。

並列關鍵字

LDMOS Metal field plate Tri-Gate Sentaurus TCAD PMD

參考文獻


[14] 張家豪, “離子佈植濃度對射頻橫向擴散金氧半場效電晶體特性影響之研究”, 碩士論文, 國立台北科技大學電腦與通訊研究所,2012
[1] Lee, J. -C; Jeong, J.Y., "High Speed, Small Area, Reliable, LTPS TFT-based Level Shifter for System-On-Panel Technology," Integrated Circuit Design and Technology, 2006. ICICDT '06. 2006 IEEE International Conference on , vol., no., pp.1,4, 0-0 0
[2] T. Ungami and B. Tsujiyama, “High voltage silicon thin film transistors on quartz”, IEEE Electron Device Lett, 1982, Vol.ED-3, pp.167-168.
[3 ]R. Pennel, R. Catero, and S. Lovelis, “Fabrication of high voltage polysilicon TFTs on an insulator,” J. Electrochem. Soc., vol. 133, pp. 2358-2361, 1986.
[4] K. Tanaka, H. Arai, and S. Khoda, “Characteristics of offset structure polycrystalline silicon thin film transistors,” IEEE Elec. Dev. Letts., vol. 9, pp. 23-25, 1988.

延伸閱讀