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  • 學位論文

CMOS-MEMS探針晶片之研製

Development of CMOS-MEMS Probe Chip

指導教授 : 黃榮堂
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摘要


本研究利用台積電0.35 μm 2P4M標準製程來設計CMOS-MEMS探針晶片,並搭配後續的微機電技術加工晶片,如微影製程、無電解電鍍鎳製程、研磨製程、乾蝕刻製程。在晶片中具有矽貫穿孔(TSV)封裝結構,並且結合CMOS製程中既有的多層內連接金屬層增加佈線的方便性,進一步可納入線路補償的被動元件或訊號處理電路於佈局之中,增加測量訊號的頻寬與品質。目前為止,以微機電技術製作之探針存在著無法與CMOS製程融合的缺點,而無法降低測試的成本。本研究成功製作出直徑90 μm、深度250 μm的矽貫穿孔,且以電鑄的方式填充銅金屬當作連接外部轉接板之線路。利用有限元素法設計探針形狀及規格,並結合類LIGA厚膜光阻製程及無電解電鍍鎳技術,沉積鎳磷合金使探針懸臂厚度增加來加強其支撐強度。當探針懸臂經過無電解電鍍鎳沉積一段時間,表面會不平均,所以必須經研磨製程提升每層結構之共面度。最後藉由該乾蝕刻製程(RIE、ICP-RIE)來釋放探針結構,成功的製作出一體成型之探針晶片。另外溼蝕刻(KOH)也成功用於蝕刻探針懸臂的變形區域。在本論文中所使用的無電解電鍍鎳為中磷,磷含量為7.436 wt%;楊氏係數量測值為101GP,退火後增加20 GPa,硬度也從3.8 GPa變成7.33 GPa;平均電阻率為2.13 x 10-6 Ω-m。新式懸臂探針在探針尖端位移量40 μm時有0.0065 N的反力,彈簧常數為160 N/m。

關鍵字

CMOS-MEMS 無電解電鍍鎳 探針

並列摘要


In this study, we use the standard TSMC 0.35 μm 2P4M process and MEMS post processing fabricate to design CMOS-MEMS probe chip. MEMS post processing involves the following steps such as lithography process, electroless nickel plating process, grinding process and dry etching process. The probe chip has through silicon via (TSV) package structure, and the combination of CMOS process within the multi-layer interconnections, which could assist the connection between the probes head the external devices, and reduce the difficulty of wiring layout. In addition, passive components or circuits could be integrated with the CMOS chip to improve the frequency bandwidth and measuring quality. So far, MEMS probes exist shortcomings that are not able to be integrated with the CMOS process, and the testing cost is high. The study successfully shows the fabrication of TSV model with the volume of 90 x 90 x 250 μm3. The model was electroformed with copper as interconnections. The finite element method was adopted to design of probe shapes and sizes. The LIGA-like thick photoresist process and electroless nickle plating technique were used in this study, Ni-P alloy to increase the thickness of the cantilever probe to strengthen its support strength is also applied. When the probe cantilever grows thick through the electroless nickel plating with longer deposition time, the uneven surface appeared. Each floor structure is polished to achieve the surface coplanarity. Finally, the probes structure were released by the dry etching process(RIE, ICP-RIE), and this study successfully fabricated a monolithic probe chip. It was also successfully to release the structure of probes by using wet etching(KOH). In this paper, the 7.436% phosphorus in the EN probe was detected by EDS. The Young’s module of EN was about 100 GPa; the hardness was 3.825 GPa. After using annealing process in the probe, the Young’s module of EN was increase 20 GPa ; the hardness was increase 2 times. The resistivity of the EN probe was 2.13 x 10-6 Ω-m. The reaction force of new design cantilever probe was 0.0065 N when the displacement of the probe tip was 40 μm, and the spring constant was 160 N/m.

並列關鍵字

CMOS-MEMS Electroless Nicke Plating Probe

參考文獻


[1] International Technology Roadmap for Semiconductors 2011, Test and Test Equipment, pp.19, 33.
[3] N. Khan, etc., "Development of 3-D silicon module with TSV for system in packaging," IEEE Transactions on Components and Packaging Technologies, vol. 33, no. 1, March 2010, pp. 4.
[4] Y. Yoshimura, etc., "Through-silicon via interconnection for 3D integration using room-temperature bonding," IEEE Transactions on Components and Packaging Technologies, vol. 32, no. 4, November 2009, pp. 750.
[5] N. Ranganathan, D. Y. Lee, L. Ebin, N. Balasubramanian, K. Prasad, and K. L. Pey, "The development of a tapered silicon micro-micromachining process for 3D microsystems packaging," Journal of Micromechanics and Microengineering, vol. 18, no. 11, 2008, 115028 (8pp).
[9] D. W. Lee and T. Ono, "Microprobe array with electrical interconnection for thermal imaging and data storage," Journal of MEMS, vol. 11, issue 3, 2002, pp. 215-221.

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