10位元200-MS/s切換電流式管線型類比數位轉換器之設計

Design of a 10-bit 200-MS/s Switched-Current Pipelined Analog-to-Digital Converter

徐明震(Ming-Cheng Hsu)

指導教授 ： 宋國明

國立臺北科技大學/電資學院/電機工程系研究所/碩士(2012年)

摘要

本論文旨在設計一種低功率十位元切換電流式管線型類比數位轉換器，其架構共計九級，前面八級為1.5位元的架構，最後一級為兩位元架構，據此完成十位元的管線型架構。此外，本論文也利用數位校正電路來校正比較器所造成的誤差，並在切換電流式的架構下，利用OP回授式電流鏡來降低輸入阻抗，以及虛開關來減少與輸入訊號相關的通道電流和電荷注入效應，藉此得到信號匹配的精確度及改善傳遞誤差。
本論文提出一個取樣率可達到200M-Samples/sec、解析度10位元的管線型類比數位轉換器，整體架構於第五級以後將取樣保持電路的回授OP分享共用，以減少九分之一的OP使用數量，以有效降低整體電路的消耗功率及面積。
在採用TSMC 0.18μm 1P6M標準製程下，其模擬結果顯示，在輸入頻率5MHz的弦波訊號及取樣率為200MHz的條件下進行模擬，其最大的訊號雜訊失真比(SNDR)可達到56.5dB，相當於解析度約9.09位元；晶片在1.8V的供應電壓下，消耗功率約為48.9mW，電路的工作電流範圍為-20μA~+20μA，FOM值可達0.47pJ/conversion，微分非線性誤差(Differential Nonlinearity, DNL)為0.7LSB，積分非線性誤差(Integral Nonlinearity, INL)為0.7LSB。核心晶片面積約為1.000×0.631 mm2。

關鍵字

類比數位轉換器 ； 管線型類比數位轉換器 ； 取樣保持電路

並列摘要

The thesis presents a low power switched-current analog-to-digital converter(ADC) which consists of 8 stages in 1.5-bit/stage, and one stage in 2-bit/stage.Notify that a digital error correction circuit is used to correct the offset error of comparator in pipelined ADC. Furthermore, not only the OP feedback is used to decrease the input impedence, but also the dummy switch is adopted to decrease the signal-dependent channel current and the charge-injection error. Those adopted techniques can decrease the transmission error considerately.
Next, this study can save power concumption by using the amplifier-sharing technique ; and that the chip area can be reduced roughly one-ninth (1/9). The simulation According to simulation results, show that the Signal-to-Noise and Distortion Ratio(SNDR) is 56.5dB whose effective number of bit (ENOB) is 9.09bits at the input frequency of 5MHzand the sampling rate of 200Ms/s in the proposed pipelined ADC fabricated in TSMC 1P6M 0.18-μm CMOS process; and that the power consumption is 48.9mw at the supply voltage of 1.8 V. Notify that the figure of merit, differential nonlinearity(DNL),and integral nonlinearity(INL) are0.47pJ/conversion, 0.7LSB, and 0.7LSB,respectively,at the operational current range between -20μA and +20μA.

並列關鍵字

Switched-current ； analog-to-digital converter ； pipelined ADC ； sample and hold circuit ； OP feedback

參考文獻

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