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  • 學位論文

新型軌對軌高效率D類音頻放大器設計

The Design of New Rail-to-Rail High-Efficiency Class-D Audio Amplifier

指導教授 : 陳建中 黃育賢
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摘要


本論文第一部分提出低電壓D類音頻放大器,所提出D類音頻放大器中使用低電壓誤差放大器,它和傳統D類音頻放大器有不同的優點,透過低電壓誤差放大器對雜訊敏感度低、功率消耗較低等優點,而控制電路採用脈波寬度調變技術。控制機制是將音源信號輸入至脈波寬度調變器中,透過輸出調變控制功率電晶體,再經由低通濾波器將音源信號還原,而控制電路簡單也成為電路一大優點。電路架構採用閉迴路,使整個電路為穩定的負回授系統,進而降低總諧波失真。低電壓D類音頻放大器使用台灣積體電路公司零點一八微米一層多晶矽六層金屬互補式金屬氧化物半導體製程實現,晶片面積為1.39 x 1.34 mm2(含PADs)。 本論文第二部分為全差動式D類音頻放大器之設計,本論文重心著重於發展一種高效率D類音頻放大器的調變方式,此電路有別於傳統全橋式D類音頻放大器信號失真過大的缺點,然而,所提出的電路改善了這個缺點,同時也具有高效率的優點,並且改變脈波寬度調變方式來實現電路。我們有注意到總諧波失真的上升是由於三角波邊緣線性度不夠而造成的,可藉由利用負回授的機制來抑制總諧波失真過高的問題。全差動式D類音頻放大器使用台灣積體電路公司零點三五微米兩層多晶矽四層金屬互補式金屬氧化物半導體製程實現,晶片面積為2.57 x 2.57 mm2(含PADs)。

並列摘要


The first part which is low-voltage class-D audio amplifier is proposed in this thesis. The proposed class-D audio amplifier uses a low-voltage error amplifier, there are some advantages different from the traditional class-D audio amplifier. The advantages include low sensitive to noise and low-power dissipation. In this work, we utilize voltage-mode control with pulse-width modulation techniques. The error signal compares with a triangle wave signal to generate a switching-control wave. The output power stage which includes two power transistors is derived by the switching wave. The second-order low-pass filter is used to eliminate output high frequency component and recover original audio signal. The low-voltage class-D audio amplifier is implemented with a TSMC 0.18μm 1P6M CMOS process, and the chip area is 1.39 x 1.34 mm2 (with PADs). The second part introduces the design of fully differential class-D audio amplifier in this thesis. The concern is that how to develop the modulation of class-D audio amplifier with high power efficiency in this thesis. The traditional H-bridge class-D audio amplifier which shortcoming is big signal distortion is worse than the proposed. However, the proposed circuit improves the drawback and makes high power efficiency at the same time. The circuit is implemented by a modified scheme of the pulse-width modulation. We have observed that, the increase of total harmonic distortion is due to non-linearity in the triangle wave. For overcoming this problem, negative feedback is adopted to reduce the total harmonic distortion. The fully differential class-D audio amplifier is implemented with a TSMC 0.35μm 2P4M CMOS process, and the chip area is 2.57 x 2.57 mm2 (with PADs).

參考文獻


[7] 杜宜融,單電感雙輸出降壓轉換器與D類放大器設計,國立臺北科技大學,電腦與通訊研究所,碩士論文,臺北,2008。
[9] 陳勝彥,無線通訊射頻功率放大器的線性化技術-LINC,國立臺灣大學,電信工程學研究所,碩士論文,臺北,2006。
[24] 張晏鍾,加速型脈寬調變與平均電流模式技術之直流-直流降壓轉換器設計,國立臺北科技大學,電腦與通訊研究所,碩士論文,臺北,2010。
[1] H. Bresch, M. Streitenberger, and W. Mathis, “About the demodulation of PWM signals with application to amplifiers,” in Proc. IEEE International Symposium on Circuits and Systems, May 2006, pp. 205-208.
[2] S. C. Li, V. C. C. Lin, K. Nandhasri, and J. Ngarmnil, “New high-efficiency 2.5 V/0.45 W RWDM class-D audio amplifier for portable consumer electronics,” IEEE Trans. Circuits and Systems II, Express Briefs, vol. 52, no. 9, pp. 1767–1774, Sep. 2005.

被引用紀錄


游日華(2014)。應用於4G LTE發射機之低雜訊降壓式轉換器〔碩士論文,國立臺北科技大學〕。華藝線上圖書館。https://www.airitilibrary.com/Article/Detail?DocID=U0006-0608201400185900

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