本論文係以標準單元製作流程來設計數位積體電路,並使用台積電0.35微米2P4M的製程技術來研發液晶顯示器用之時序控制晶片。 該液晶顯示器用的時序控制器可接收不同規格的視訊訊號,經由一連串的伽瑪校正後,依色彩轉換的數學模型,產生液晶顯示器的源極驅動器與閘極驅動器所需要的灰階訊號與控制訊號。 本論文採用的是Verilog硬體語言,軟體驗證由ModelSim軟體來完成,硬體驗證則由可規劃邏輯閘陣列擔綱。實驗結果顯示,本論文中所製作的積體電路各方塊功能均正確,該架構對提升數位控制系統的性能和控制法則的硬體化有很大的幫助。
The main research of the thesis is based on the cell-based digital IC design flow, By using the TSMC 2P4M cell library, we design a TFT LCD timing control IC , that is used to analyze the mathematical model of the color space conversion . Note that the proposed conversion can meet both video format and transmission standards. After the Gamma correction has been completed, we can obtain a variety of Gray level through the color space converter theorem. In this paper, the Verilog HDL is used to design the ASIC. First of all, the Verilog code has been verified with ModelSim software and FPGA hardware. After both the processes of RTL simulation and the Gate level simulation have been made, the designed code will be transferred into ASIC. The proposed control architecture contributes to the advancement of the digital control performance and the realization of control algorithm.