應用於電路交換型晶片網路之高效率通訊排程方法設計與實現

Design and Implementation of an Efficient Communication Scheduling Scheme for Circuit-Switched Network-on-Chip

林易興(Xi-Shing Lin)

指導教授 ： 李宗演

國立臺北科技大學/電資學院/電腦與通訊研究所/碩士(2010年)

https://doi.org/10.6841/NTUT.2010.00310

摘要

近幾年來隨著晶片製程的不斷進步，系統晶片(SoC, System-on-Chip)的設計更趨於複雜化，通訊網路架構就更顯得重要。因此具有網路概念架構的晶片網路(NoC, Network on Chip)相繼被提出去解決SoC內部元件通訊的問題。NoC的架構著重於結構簡單和有效率。在電路交換型(Circuit-switched)的NoC中，其IP(Intellectual Property)之間的溝通採專用的連線，可確保系統的延遲時間(Latency)和產出率(Throughput)之效能。所以本論文提出一個電路排程演算法，去配置通訊路徑使用連結路徑的時間，可以降低每個通訊路徑在交換器的等待時間。排程過程中遇到阻塞情況時，先以延遲通訊路徑的輸出時間方式來調整，若還是有衝突情況發生，則改用交換兩條路徑的輸出時間的調整方式，其方法分別為配置路徑的輸出時間調整和衝突路徑的輸出時間調整，來避開和減少阻塞的時間。最後，我們將排程結果應用於2D Mesh NoC架構中，由實驗結果得到本方法在電路排程中的平均等待時間可減少為74.83%，每個交換器的平均等待時間也減少78.25%。

關鍵字

晶片網路 ； 電路交換 ； 分時多工 ； 電路排程演算法

並列摘要

The SoC(System-on-Chip) design is more complex because the integrated circuit fabrication technology progress in recent years. Therefore, some NoC(Network on Chip) architectures were purposed to solve the communication problems between the component in a SoC. The architecture of NoC requires simple and high performance. The circuit-switched NoC has dedicated circuits for data transmission between IPs (Intellectual Property) because the data latency and throughput in NoC can be guaranteed. Therefore, we propose a circuit scheduling scheme to allocate the communication path which can reduce waiting time in every switch. When data congestion is happened, the proposed scheduling scheme will delay the output time of allocation circuit delay to avoid data congestion. If data congestion still happens, we exchange output time between allocation circuit and appropriate circuit. There are two exchange methods. The first is to change the output time of allocation circuit, the other is to change the output time of conflicting circuit. Finally, we apply the proposed scheduling scheme on 2D mesh NoC. The experimental results show that the proposed method reduces74.83% on average waiting time per circuit scheduling scheme, 78.25% on average waiting time at every switch.

並列關鍵字

Network on Chip ； Circuit-switched ； Time division multiplex ； scheduling scheme

參考文獻

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