以新型數位濾波架構實現高性能功率因數修正器之研製

Using a New Digital Filter Scheme to a High Performance Power Factor Corrector

彭彥淳(Yen Chun Peng)

指導教授 ： 曾國雄 ； 俞齊山

國立臺北科技大學/電資學院/電機工程系研究所/碩士(2011年)

摘要

本論文主要目的在研究以離散傅立葉轉換為基礎，建立一新型數位濾波架構以實現高性能功率因數修正器。利用此架構可以解決傳統的功率因數修正器因為降低電壓迴路控制頻寬所造成暫態響應不佳的問題。控制器的架構採用多迴路之交錯式控制方式，其中包括電流內迴路與電壓外迴路，此外，電壓外迴路使用高頻寬架構，以改善電路的暫態響且縮短系統安定時間。
本論文利用Matlab/Simulink建立系統模型，驗證所設計之控制器的性能和可行性，經由eZdsp TMS320F2808控制卡為平台配合VisSim/ECD實現所設計之控制器。經由實測結果，本論文所設計之功因修正器可將功率因數提昇至97%，當負載變動時，依然具有良好的暫態響應。

關鍵字

離散傅立葉轉換 ； 數位訊號處理器 ； 功率因數修正器

並列摘要

The main purpose of this thesis is to develop a Discrete Fourier Transform (DFT) based on a digital filter for realizing a high performance power factor corrector (PFC) controller. By using the proposed filter, poor transient response problems in the PFC circuits could be improved. The controller is constructed by a multi-loop scheme, including an inner current loop and an outer voltage loop. The purposed digital filter is installed in the voltage outer loop to improve the transient response.
This thesis uses the Matlab/Simulink simulator to build a model for verifying the performance and the feasibility of the proposed controller. The realization of the digital controller is made by a eZdsp TMS320F2808 DSP starter kit (DSK) and coded by the VisSim/ECD. The power factor can be improved by the proposed controller up to 97% . When load variations, good transient responses can still be maintained on the purpose circuit.

並列關鍵字

Discrete Fourier Transform ； Digital Signal Processor ； Power Factor Corrector

參考文獻

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