高速球柵陣列封裝互連之球位設計與安排

Ball-out Arrangement and Design for High-speed signals in a Ball Gird Array Package

陳俊宏(Chun-Hung Chen)

指導教授 ： 林丁丙 ； 陳文輝

國立臺北科技大學/機電學院/自動化科技研究所/碩士(2007年)

摘要

本論文將討論高速晶片球柵陣列封裝之球位安排設計，可提升信號完整性及電源完整性的效能問題。球柵陣列球位安排如同是連接器的設計一樣重要，球柵陣列封裝信號球位或是電源數目與球位是影響封裝尺寸的大小及互連之效能，晶片透過球柵陣列封裝連接至各種高速匯流排，信號及電源將透過錫球，在封裝與印刷電路板之間傳遞能量，因此高速匯流排信號完整性及電源完整性要求會影響到錫球位置及錫球數的多寡，進而影響封裝大小及高速匯流排的效能。
本論文透過一實例球柵陣列封裝的球位安排，連接高速晶片封裝與印刷電路板，實現高速晶片與各種高速匯流排的連接，且能達到信號完整性及電源完整性應有的效能，並由量測結果驗證。

關鍵字

互連 ； 球柵陣列封裝互連 ； 電源完整性 ； 訊號完整性

並列摘要

In this thesis, how to improve signaling quality and power integrity by way of optimizing ball-out arrangement for all these high-speed signals and their associated Input-Output (IO) powers and digital or analog grounds in a Ball Grid Array (BGA) package will be discussed. The ball-out arrangement plays a major role in a BGA package design when considering Signal Integrity (SI) and Power Integrity (PI) issues. For example, the number of ball count for all signal/power/ground signals directly impact the BGA package size. And in order to maintain high signaling quality, different ball-out designs for different high-speed buses should be respectively well taken care of. Through the BGA package, signal and power will go through the tin balls, and then the power is transferred between package and print circuit board, therefore, the integrity requirements both for signal and power are essential considerations when deciding the number and location of tin balls and the size of package and the efficiency of high speed buses are also thus affected.
Through a case study, a practical ball-out arrangement scheme is proposed for one or multiple high-speed buses in a BGA package design, which can meet SI and PI requirements all times. Both measured results and waveforms are also testified for reference.

並列關鍵字

Interconnect ； Interconnect of ball-grid array ； Signal integrity ； Power integrity

參考文獻

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