本論文的研究重點分為兩個部份,第一部份:利用各式電流模式主動元件,藉由線性轉換(linear transformation)的方式合成高階主動低通濾波器。此設計方式具有系統化設計流程、電路設計較簡單、最少主動元件以及電阻與電容均接地等優點。電流差分緩衝放大器採用TSMC 0.35μm 2P4M製程,電源電壓為±1.65V,功率消耗為3.5mW,晶片面積為0.85mm2(含PAD)。第二部份:目標在設計極低頻濾波器與振盪器,並且可將其應用在生醫晶片設計上。由於生醫訊號頻率屬於極低頻率,因此所需的時間常數τ很大,這會使得電路整體的電阻值和電容值變大。過大的電阻、電容值會增加晶片的面積,這對於電路積體化來說相當的不利,而且會造成晶片製作成本的提高。本論文利用極低轉導值之運算轉導放大器以及電容放大電路,來設計極低頻濾波器與振盪器。極低頻濾波器電路採用TSMC 0.35μm 2P4M製程,操作頻寬為2Hz,電源電壓為±1.65V,功率消耗為64μW,晶片面積為1.65mm2(含PAD);極低頻振盪器電路採用TSMC 0.35μm 2P4M製程,電容為外接,電源電壓為±1.65V,操作頻率可以做調整(0.1Hz ~10Hz),功率消耗為62μW,晶片面積為1.24mm2(含PAD)。
The major research of this thesis can be divided into two parts. The first part of this thesis is to implement high order active low pass filter using many kinds of current-mode active element and the linear transformation synthesis method. The design method has following merits:systematic design procedures, simple design equations, minimize active elements, and all grounded resistors and capacitors. The current differencing buffered amplifier circuit is implemented using TSMC 0.35μm 2P4M process whose power supply is ±1.65V, the power consumption is 3.5mW, and the chip area with PAD included is 0.85mm2. The second part, our purpose is to design very low frequency filters and oscillators which can be applied to the design of biomedical chip. Because of the low frequency of biomedical signal, the time constant which the very low frequency circuits need must be very large. This situation will make the resistances and capacitances of very low frequency circuits to be large. It is unfavorable to integrate the circuit due to large resistances and capacitances. This will increase the cost of fabricating biomedical chip. This thesis uses ultra-low transconductance OTA and capacitance multiplication circuit to design very low frequency filters and oscillators. The very low frequency filter is implemented using TSMC 0.35μm 2P4M process whose power supply is ±1.65V, the filter bandwidth is 2Hz, the power consumption is 64μW, and the chip area with PAD included is 1.65mm2. The very low frequency oscillator is implemented using TSMC 0.35μm 2P4M process whose power supply is ±1.65V, all of the capacitors are external the chip for adjusting the oscillation frequency which is from 0.1Hz to 10Hz, the power consumption is 62μW, and the chip area with PAD included is 1.24mm2.