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  • 學位論文

以電流式主動元件為基礎設計電壓模式可調主動濾波器

Design of Voltage-Mode Tunable Active Filter Based on Current-Mode Active

指導教授 : 黃育賢 陳建中

摘要


本論文的研究重點在於,使用線性轉換方法,設計頻寬可調式低通主動濾波器。共分為三部份之研究:第一部份,使用第二代電流傳輸器合成六階巴特沃茲低通主動濾波器,製程技術採用TSMC 0.35μm 2P4M製程,電源電壓±1.65V,功率消耗30.7mW,輸入電壓最大振幅為0.6VP-P,晶片面積為0.168588mm2 (446μm*378μm,不含PAD);第二部份,利用數位控制方式來控制第二代電流傳輸器,並合成六階可調式巴特沃茲低通主動濾波器,達成主動濾波器頻寬可以調整的目的。製程技術採用TSMC 0.18μm 1P6M製程,可調整頻寬範圍為11KHz至1.44MHz,電源電壓±0.9V,功率消耗5.54mW,輸入電壓最大振幅為0.6VP-P,晶片面積為0.359296mm2 (802μm*448μm,不含PAD);第三部份,使用另一種主動元件為差動差分電流傳輸器,再利用數位控制方式來控制差動差分電流傳輸器,合成六階可調式巴特沃茲低通主動濾波器,達成主動濾波器頻寬可以調整的目的,亦可使主動元件數目為最精簡情況。製程技術採用TSMC 0.18μm 1P6M製程,可調整頻寬範圍為14KHz至2.62MHz,電源電壓1.8V,功率消耗3.64mW,輸入電壓最大振幅為0.6VP-P,晶片面積為0.31515mm2 (550μm*573μm,不含PAD)。

並列摘要


The key point of major research of this thesis is that the author uses the linear transformation method to design the low-pass tunable bandwidth active filter. This thesis can be divided into three parts. The first part of this thesis is to implement a 6th-order Butterworth low-pass filter using second generation current conveyors with TSMC 0.35μm 2P4M technology. The power supply is ±1.65V, the power consumption is 30.7mW, and the chip area is 0.168588mm2. The second part of this thesis is to implement a 6th-order tunable Butterworth low-pass filter using digitally controlled method that achieved the bandwidth of active filter can be tuned to control second generation current conveyors with TSMC 0.18μm 1P6M technology. The tunable bandwidth of active filter is about 11KHz to 1.44MHz. The power supply and the power consumption are ±0.9V and 5.54mW, and the chip area is 0.359296mm2. The third part of this thesis is to implement a 6th-order tunable Butterworth low-pass filter using the another active component called the differential difference current conveyor and uses digitally controlled method to control differential difference current conveyors to achieve the purpose that the bandwidth of active filter can be tuned with TSMC 0.18μm 1P6M technology. The tunable bandwidth of active filter is about 14KHz to 2.62MHz. The power supply and the power consumption are 1.8V and 3.64mW, and the chip area is 0.31515mm2 without PAD circuits.

參考文獻


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[3] D. Dubois and J. Neirynck, “Synthesis of a leapfrog configuration equivalent to an LC-ladder filter between generalized terminations,” IEEE Transaction on Circuits and Systems, Vol. 24, No. 11, pp. 590-597, November 1977.
[5] H. A. Alzaher, H. O. Elwan, and M. Ismail, “A CMOS highly linear channel-select filter for 3G multistandard integrated wireless receivers,” IEEE Journal of Solid-State Circuits, Vol. 37, No. 1, pp.27-37, January 2002.
[6] U. Stehr, F. Henkel, L. Dalluge, P. Waldow, “A fully differential CMOS integrated 4th order reconfigurable GM-C lowpass filter for mobile communication,” in IEEE International Conference Electronics, Circuits and Systems, Vol 1, No. 14-17, December 2003, pp.144-147.

被引用紀錄


顏士博(2009)。以相位/頻率偵測器自動調整之電流模式主動濾波器設計與實現〔碩士論文,國立臺北科技大學〕。華藝線上圖書館。https://www.airitilibrary.com/Article/Detail?DocID=U0006-1808200917112300
邱創郁(2010)。使用交換式電容技術設計自動調整頻率濾波器〔碩士論文,國立臺北科技大學〕。華藝線上圖書館。https://www.airitilibrary.com/Article/Detail?DocID=U0006-1308201017000700
陳俊宇(2010)。利用延遲鎖定迴路技術之自動調整切換式電容濾波器設計〔碩士論文,國立臺北科技大學〕。華藝線上圖書館。https://www.airitilibrary.com/Article/Detail?DocID=U0006-1308201021240500

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