不同後續退火技術改善矽化鉿金屬氧化層場效電晶體之研究

Study on the MOSFETs with Hf-Silicate Gate Dielectrics through Various Post Annealings

陳科仲(Ke-Chung Chen)

指導教授 ： 黃恆盛 ； 陳雙源

國立臺北科技大學/機電學院/機電整合研究所/碩士(2006年)

摘要

隨著CMOS 技術急速的微縮到奈米技術節點，傳統閘極介電層二氧化矽層將達到其物理與電性限制。主要的問題是電子穿隧效應，會造成大量的穿過超薄二氧化矽層。為了可以有效的抑制此漏電流，高介電常數的閘極介電層材料，將會取代傳統的二氧化矽層，因在相同的等效電性氧化層厚度(EOT)下，其可增加實際介電層的厚度來降低漏電流。
在本論文中，我們對於具有矽氧化鉿堆積式閘極介電層之電容器與電晶體，執行不同的後處理，包括沉積後的NH3氮化處理與有否做N2退火處理，研究其對矽氧化鉿堆積式閘極介電層的電性影響。我們發現於矽氧化鉿介電層沉積後，單使用800 ℃NH3對矽氧化鉿介電層做氮化處理，與加做N2退火作比較，其試片呈現出較好的元件特性、具有較小的等效厚度、較低的漏電流、較高的載子遷移率等。

關鍵字

矽氧化鉿 ； 電荷傳輸機制

並列摘要

As CMOS devices are scaled aggressively into nanometer regime, SiO2 gate dielectric is approaching its physical and electrical limits. The primary issue is the intolerably huge leakage current caused by the direct tunneling of carriers through the ultrathin oxide. To substantially suppress the leakage current, high-k materials are recently employed by exploiting the increased physical thickness at the same equivalent oxide thickness (EOT).
In this thesis, the electrical characteristics of capacitance and MOSFETs with HfSiO/SiON gate stack subjected various NH3 Nitridation and N2 post- deposition anneal treatments, we investigated the effects of NH3 Nitridation and N2 post- deposition anneal for HfSiO dielectric MOSFET, The samples with 800℃NH3 Nitridation show much EOT, lower leakage current, higher mobility than the samples with N2 post- deposition anneal treatment.

並列關鍵字

HfSiON ； Carrier transport mechanism

參考文獻

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