High-k堆疊PMOSFETs於不同氮濃度和退火溫度下之漏電流特性

近年來，高介電材料/金屬閘極(HK/MG)堆疊技術大量的被應用在新世代的MOSFET上，因為其可減少等效氧化層厚度，解決在閘極介電層厚度微縮的情況下，所造成較大的閘極漏電流問題，並且可以提升驅動電流。但卻鮮少有探討去耦合電漿氮化(DPN)退火於不同退火溫度和氮濃度下，對閘極介電層之基本電性及漏電流特性的影響，因此，此方面為本論文研究重點。本研究是使用聯華電子所提供28奈米製程的p型電晶體（pMOSFET），閘極氧化層是利用原子層沉積技術(ALD)製作氧化鋯鉿(HfZrOx)介電層。實驗的製程參數為不同退火溫度和氮的濃度。經由施加電壓一段時間後使其劣化，或是於不同的測量溫度來做對比，再依據所得資料，進行統計、分析實驗結果與溫度和施加電壓前後之間的關係，且探討不同退火溫度與含氮量之間的差異。研究結果顯示，退火溫度(800~1000℃)及10%以下含氮量的電晶體，由於退火溫度較高，所形成的晶粒可能較多，使得閘極漏電流是最大的。而在經過加壓測試之後，發覺800~1000℃、10%以下含氮量的電晶體之閘極漏電流增加幅度最大。此外，在升溫測試中，看到閘極漏電流與閘極引發汲極漏電流都會隨著溫度升高而增加。

關鍵字

二氧化鉿(HfO2) ；去耦合電漿氮化(DPN) ；閘極漏電流；氧化鋯鉿(HfZrOx) ；原子層沉積技術(ALD)

並列摘要

In recent years, high-k/metal-gate (HK/MG) stack technique has widely applied in the advanced MOSFETs because of decreasing equivalent oxide thickness (EOT). It also can solve the leakage issue due to continued device scaling down, raising up the drive current. However, few published literatures discussed the nitridation effect of decoupled plasma nitridation (DPN) process and different annealing temperatures on the electrical characteristics and leakage current behaviors of the devices. Therefore, this study focuses on these points to identify and establish their relationships of the devices. In this work, the tested 28nm sample wafers came from UMC. The hafnium-based gate dielectric with a profile of HfOx/ZrOy/HfOz (HZH) was deposited with atomic layer deposition (ALD) technology. The wafers were then annealed with different annealing temperatures and nitrogen concentrations after ALD process. After stress or alternating experimental temperatures, degradation behaviors of the devices on stress voltage and temperatures was compared. The experimental results of this work indicated that the pMOSFETs under the 800~1000℃ annealing temperatures with lower than 10% nitrogen concentration has the largest gate leakage probably because of the larger amount of grain generation in oxide layer. The 800~1000℃ annealing temperatures with lower than 10% nitrogen concentration sample has the largest amount of increasing gate leakage. On the other hand, higher measured temperature we used, higher gate leakage and gate induced drain leakage were observed.

並列關鍵字

HfO2 ； Decoupled plasma nitridation (DPN) ； gate leakage ； HfZrOx ； ALD

參考文獻

[1] J. Robertson, “Electronic structure and band offsets of high-dielectric-constant gate oxides,” Mater. Research Soc., vol. 27, 2002, pp. 217-221.

[2] D. G. Schlom and J. H. Haeni, “A thermodynamic approach to selecting alternative gate dielectrics,” Mater. Research Soc., vol. 27, 2002, pp. 198-200, 2002.

[3] J. Robertson, “Band offsets of wide-band-gap oxides and implications for future electronic devices,” J. Vac. Sci. Technol. B, vol. 18, 2000, pp. 1785-1791.

[4] M. Jo, H. Park, J.-M. Lee et al., “Effect of oxygen postdeposition annealing on bias temperature instability of hafnium silicate MOSFET,” IEEE Electron Device Lett., vol. 29, no. 4, 2008, pp. 399-401.

[5] A. Kerber, E. Cartier, L. Pantisano et al., “Characterization of the Vt -instability in SiO2/HfO2 gate dielectrics,” Proc. IRPS, 2003, pp.41-45.

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High-k堆疊PMOSFETs於不同氮濃度和退火溫度下之漏電流特性

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