以軟體無線電架構下實現GMSK收發機

Implementing the GMSK Transceiver based on Software Radio Architecture

徐榮建(Jung-Chien Hsu)

指導教授 ： 陳逸民

元智大學/工程學院/電機工程學系/碩士(2001年)

摘要

隨著行動通訊的發展，產生許多不同規格的系統。如何能將數種規格整合至單一系統中，為重要的課題之一。軟體無線電的觀念提供是非常實用的解決方案，提供了射頻、中頻與基頻更多的彈性。數位訊號處理的範圍也從基頻延伸至中頻，除了基頻上原本的調變/解調外，還包括對中頻訊號的升/降頻。
本文將以軟體無線電架構下進行GMSK收發機之研究。硬體上包含類比/數位轉換器ADC (AD9042-12Bits 40MIPS ADC ) 、數位/類比轉換器(AD9713B-12Bits 80MIPS DAC) 、TI TMS320VC5402與XILINX Virtex-600E建立起數位訊號處理模組版(Daughterboard)。基頻中，GMSK解調器採用Feedforward的架構，同步的問題以Nondata-aided 方法對做時脈及頻率的估測，接著以差分決策器作解調。最後再以TMS320C54x的組合語言撰寫程式，實現GMSK調變/解調器，以獲得較佳的效能。

關鍵字

軟體無線電 ； 可程式邏輯陣列 ； 數位訊號處理器 ； GMSK收發機

並列摘要

As significant developments in wireless technology and markets, many wireless mobile communications systems with various standards have evolved. It is thus a crucial issue to have a terminal capable of providing interoperability among various wireless communications systems. The Software Radio or Software-Defined Radio (SDR) technology is arising for this demanding purpose, which provides great flexibility and reconfigurability in related baseband and IF signal processing.
In this thesis we present a research result of implementing a GMSK transceiver with Software Radio technology. The hardware platform incorporates a DSP processor (TI TMS320VC5402 DSK), a FPGA (XILINX Virtex-600E FPGA), an ADC (AD9042-12Bits 40MSPS), and a DAC (AD9713B -12Bits 80MSPS). We consider the feedforward demodulator structure , where the symbol timing estimation and carrier frequency offset compensaion are solved by a nondata-aided method. A differential detector then performs the data detection after the synchronizer.The GMSK modulator and GMSK noncoherent demodulator is implemented with assembly language running on the DSP processor , achieving the better performance.

並列關鍵字

Software Radio ； FPGA ； DSP Processor ； GMSK Transceiver

參考文獻

[1] J. Mitola ,”The Software Radio Architecture,” IEEE Commun. Mag. , May 1995

[2] E. Buracchini,”The Software Radio Concept,” IEEE Commun. Mag. , Sept 2000

[3] D. B. Chester, “Digital IF Technology for 3G System: An Introduction,” IEEE Commun. Mag. , pp.102— 107, Feb. 1999.

[4] Y. M. Chen,” Computationally efficient multichannel digital up converter,” Signal Processing Proc., 2000. WCCC-ICSP 2000. 5th Int. Conf. on , Vol. 3 , 2000

[5] R. E. Crochiere, L. R. Rabiner, Multirate Digital Signal Processing, Prentice-Hall, 1983.