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  • 學位論文

利用覆晶(Flip Chip)構裝技術開發靜態隨機存取記憶體(SRAM )之多晶片模組(MCM)

Use Flip Chip Package Technology to Develop Multi-Chip Module of Static Random Access Memory(SRAM)

指導教授 : 黃振球
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摘要


未來電子產品發展趨勢朝向更輕、更薄、更短、更小化,尤其在攜帶型通訊設備、筆記型電腦、掌上顯示器、攜帶型醫學儀器、航太及國防科技等電子系統產品。覆晶構裝技術是我們想達成電子產品輕、薄、短、小化最佳技術之一,覆晶構裝技術有下列優點:晶片散熱面積較大、可減少功能晶片與電子線路板組裝後的干擾及雜訊、可應用於高頻電子產品、可使用於最高密度I/O之晶片元件構裝、可使用於最小面積之電子線路板等。 在本研究中,我們選擇一般電腦設備均需使用之記憶體作為本次研究之主題,我們使用4顆128 x 8之靜態隨機存取記憶體(SRAM),將其以覆晶構裝技術構裝成一個多晶片模組(Multi Chip Module)。在研究過程中,我們使用陶瓷基板(Ceramic Substrate)及FR-4基板作為多晶片模組之基板。在試驗失敗過程中,為了減少可能造成失敗的因子,我們使用晶片(Dies)放置在基板上(Chip On Board)之鎊線(Wire Bonding)製程,確認那些因子是造成失敗主因之後,我們又回到覆晶構裝製程,最後我們成功開發了以覆晶為構裝之多晶片模組。 在本論文中,除了詳細敘述本研究之試驗過程外,也在理論及製程技術章節中,介紹本研究試驗的各製程使用機器及製程技術。

關鍵字

覆晶構裝 鎊線

並列摘要


In the future trend, the electronic products are moving to lighter, thinner, shorter and smaller, especially for mobile communication equipment, notebook, handy monitor, mobile medical equipment, space and defense electronic system. Flip chip package technology is the best one that we went to achieve those goods. It has following advantages: such as larger thermal transfer area, reduction of interference and noise, suitable for high frequency product, can be used in highest density of Input / Output and lowest device footprint. In this study, we select the memory device that is used in computer normally as an object of this study. We use 4 of 128 x 8 Static Random Access Memory(SRAM), with flip chip package we assembly these chips to a Multi Chip Module. In the study progress we use ceramic substrate and FR-4 substrate to be the substrate of Multi Chip Module. During the failure progress, we want to reduce the possible failure factor, we use the wire bonding process for dies on board, make sure which factor is the major cause of the failure. Then we go back to the flip chip package process, finally we successfully develop this Multi Chip Module based on flip chip package. In this paper, except going through the detail process, we also introduce the manufacture support equipment and process techniqure in the chapter of theory and technology.

並列關鍵字

Flip Chip Package Wire Bonding.

參考文獻


〔5〕D. J. Kovach, N. S. Amirgulyan, C. P. Chien, and M. H. Tanielian, 〝Minimizing Stress in Cu / Polyimide Processes for Large Format MCM Manufacturing 〞, International Microelectronics and Package Society, 2000
〔7〕L. A. keser, R. Bajaj and T. Fang, 〝Redistribution and Bumping of a High I / O Device for Flip Chip Assembly〞, IEEE Transactions Advanced Package, 2000
〔8〕K. W. Oh, and C. H. Ahn,〝A New Flip Chip Bonding Technique Using Micromachined Conductive Polymer Bumps〞, IEEE Transactions Advanced Package , 2000
〔9〕K. L. Lin and Y. T. Liu,〝Manufacturing of Solder Bumps with Cu / Ta / Cu as Under Bump Metallurgy〞, IEEE Transactions Advanced Package, 2000
〔10〕K. L. Lin and Y. T. Liu,〝Manufacturing of Cu / Electroless Nickel / Sn — Pb Flip Chip Solder Bumps〞, IEEE Transactions Advanced Package, 2000

被引用紀錄


沈基盟(2007)。代理商整合電子業上下游技術轉移策略研究-以系統級封裝技術轉移為例〔碩士論文,元智大學〕。華藝線上圖書館。https://doi.org/10.6838/YZU.2007.00145
劉大維(2005)。多晶片模組的熱應力分析〔碩士論文,國立臺北科技大學〕。華藝線上圖書館。https://www.airitilibrary.com/Article/Detail?DocID=U0006-0301200615250100

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