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  • 學位論文

基於改良式Modulo-N並具任意可調責任週期之全數位頻率合成器

Modified Modulo-N-Based All Digital Frequency Synthesizer with an Arbitrary Adjustable Duty-Cycle

指導教授 : 趙燿庚

摘要


基於改良式Modulo- 和一組參考方波,設計出一個具有高效能的全新數位頻率合成器,其中該組參考方波有相同的頻率,卻各自有不同的相位。將該組參考方波通過一個多工器,並藉由一漸增器(Incrementer)運作,可由該組參考波組合得到最大的輸出頻率,其中使用一格雷編碼器(Gray encoder),得以控制多工器的輸出,而達到消除脈衝干擾(Glitch)問題的目的,並控制兩個頻率控制位元K1和K2,可以合成各種頻率的波形輸出並控制輸出波形的Duty-cycle。藉由Cell-Based設計實現流程,使用TSMC 0.18um製程以圖形方式來驗證電路設計的Pre-Layout和Post-Layout模擬結果。

並列摘要


With modulo-N arithmetic and a set of reference square waveforms, a new architecture of high-performance digital frequency synthesizer is devised, where the reference square waveforms with the same frequency but different phases are passed through a multiplexer to obtain the maximal frequency with an incrementer. A Gray encoder is designed to eliminate the glitch problem. Use frequency control word k1、k2 can synthesize arbitrary output frequency and control the duty-cycle of waveform. Pre-layout and post-layout simulation results based on the TSMC 0.18um cell-based implementation are illustrated to validate the design, which can be used for TSMC 0.18 um realization.

參考文獻


[12] 楊穎元,“創新的全數位頻率合成器設計分析與實現”, Jane 2006.
[1] H. Mair and L. Xiu, “An architecture of high performance frequency and phase synthesis,” IEEE J. Solid-State Circuits, vol. 35, pp. 835–846,June 2000.
[2] L. Xiu and Z. You, “An flying-adder architecture of frequency and phase synthesis with scalability,” IEEE Trans. VLSI Syst., vol. 10, pp. 637–649,Oct. 2002.
[3] V. F. Kroupa, Phase Lock Loops and Frequency Synthesis, Wiley, 2003.
[5] M.Morris Mano, Digital Design, 3rd

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