This thesis utilizes TSMC CMOS 0.18 um process to implement radio frequency power amplifier applying in 2.4GHz Bluetooth and WLAN 802.11b/g systems. The circuit design methods for overcoming the low breakdown voltages and the hot carrier phenomena at high power operation in the CMOS devices are presented to achieve the higher output power levels. Furthermore the linear power amplifier design using a linearizer for 802.11b/g applications is demonstrated as well for reducing the third order nonlinear term and improving the 1dB gain compression point. Finally some design difficulties with the CMOS processes including the simulation/measurement discrepancy and the layout problem are addressed.